ATE469397T1 - Integrierte schaltung und verfahren zur transaktionszurückziehung - Google Patents

Integrierte schaltung und verfahren zur transaktionszurückziehung

Info

Publication number
ATE469397T1
ATE469397T1 AT05709014T AT05709014T ATE469397T1 AT E469397 T1 ATE469397 T1 AT E469397T1 AT 05709014 T AT05709014 T AT 05709014T AT 05709014 T AT05709014 T AT 05709014T AT E469397 T1 ATE469397 T1 AT E469397T1
Authority
AT
Austria
Prior art keywords
integrated circuit
transaction
processing module
transaction withdrawal
withdrawal
Prior art date
Application number
AT05709014T
Other languages
English (en)
Inventor
Andrei Radulescu
Kees Goossens
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE469397T1 publication Critical patent/ATE469397T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/17Interprocessor communication using an input/output type connection, e.g. channel, I/O port
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
  • Devices For Checking Fares Or Tickets At Control Points (AREA)
  • Financial Or Insurance-Related Operations Such As Payment And Settlement (AREA)
  • Control Of Vending Devices And Auxiliary Devices For Vending Devices (AREA)
AT05709014T 2004-03-26 2005-03-15 Integrierte schaltung und verfahren zur transaktionszurückziehung ATE469397T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP04101262 2004-03-26
PCT/IB2005/050907 WO2005093590A1 (en) 2004-03-26 2005-03-15 Integrated circuit and method for transaction retraction

Publications (1)

Publication Number Publication Date
ATE469397T1 true ATE469397T1 (de) 2010-06-15

Family

ID=34961503

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05709014T ATE469397T1 (de) 2004-03-26 2005-03-15 Integrierte schaltung und verfahren zur transaktionszurückziehung

Country Status (8)

Country Link
US (1) US7917728B2 (de)
EP (1) EP1733309B1 (de)
JP (1) JP2007534052A (de)
KR (1) KR20070003969A (de)
CN (1) CN100478928C (de)
AT (1) ATE469397T1 (de)
DE (1) DE602005021474D1 (de)
WO (1) WO2005093590A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100653087B1 (ko) * 2005-10-17 2006-12-01 삼성전자주식회사 AXI가 적용된 NoC 시스템 및 그 인터리빙 방법
FR2904445B1 (fr) * 2006-07-26 2008-10-10 Arteris Sa Systeme de gestion de messages transmis dans un reseau d'interconnexions sur puce
WO2009072134A2 (en) * 2007-12-06 2009-06-11 Technion Research & Development Foundation Ltd Bus enhanced network on chip
US20090307408A1 (en) * 2008-06-09 2009-12-10 Rowan Nigel Naylor Peer-to-Peer Embedded System Communication Method and Apparatus
US8594966B2 (en) * 2009-02-19 2013-11-26 Advanced Micro Devices, Inc. Data processing interface device
US8463958B2 (en) * 2011-08-08 2013-06-11 Arm Limited Dynamic resource allocation for transaction requests issued by initiator devices to recipient devices
WO2017136289A2 (en) * 2016-02-02 2017-08-10 Xilinx, Inc. Active-by-active programmable device
US10002100B2 (en) 2016-02-02 2018-06-19 Xilinx, Inc. Active-by-active programmable device

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01129647A (ja) 1987-11-16 1989-05-22 Hitachi Ltd 遠隔保守システム
JPH0358160A (ja) * 1989-07-26 1991-03-13 Nec Ibaraki Ltd バス制御方式
JPH08171528A (ja) 1994-12-19 1996-07-02 Ricoh Co Ltd データ処理装置
JPH11129647A (ja) 1997-10-24 1999-05-18 Yoshiharu Suzuki 位置半固定栞
JPH11296471A (ja) * 1998-04-09 1999-10-29 Matsushita Electric Ind Co Ltd データ転送方法およびdmaコントローラ
CN1248514C (zh) * 1999-08-31 2006-03-29 西门子公司 建立和撤销通信连接的方法和装置
AU2001266752A1 (en) * 2000-06-06 2001-12-17 Michael Rothman System and method for extracting value for consumers and institutions from depthof relationships
TW561754B (en) * 2001-02-23 2003-11-11 Koninkl Philips Electronics Nv Authentication method and data transmission system

Also Published As

Publication number Publication date
EP1733309A1 (de) 2006-12-20
KR20070003969A (ko) 2007-01-05
CN1934550A (zh) 2007-03-21
JP2007534052A (ja) 2007-11-22
DE602005021474D1 (de) 2010-07-08
US7917728B2 (en) 2011-03-29
US20080244225A1 (en) 2008-10-02
CN100478928C (zh) 2009-04-15
EP1733309B1 (de) 2010-05-26
WO2005093590A1 (en) 2005-10-06

Similar Documents

Publication Publication Date Title
ES2527321T3 (es) Método y dispositivo para la activación de usuarios de un sistema de bus y un usuario correspondiente
DE602005021303D1 (de) Elektronische Schaltungsanordnung und Verfahren zu deren Herstellung.
ATE498867T1 (de) Verfahren und vorrichtungen zur unterstützung mehrerer konfigurationen in einem mehrprozessorsystem
ATE491274T1 (de) Vorrichtung zur synchronisation zweier bussysteme sowie anordnung aus zwei bussystemen
TW200641596A (en) PCI express system and method of transitioning link power state thereof
ATE548756T1 (de) Einrichtung und verfahren zur herstellung einer doppelseitigen kapselung auf soi-wafermassstab mit durchkontaktierungen
EP2475100A3 (de) Taktmodusbestimmung in einem Speichersystem
FI20031341L (fi) Menetelmä elektroniikkamoduulin valmistamiseksi
EP1777535A3 (de) Vorrichtung und Verfahren zur Störsignaldetektion in einem geschützten Mikroprozessor
ATE469397T1 (de) Integrierte schaltung und verfahren zur transaktionszurückziehung
ATE555430T1 (de) Systeme und verfahren für computersicherheit
TW200943152A (en) Method of detecting capacitor type touch device
DE602004017972D1 (de) On-bord-diagnose (obd)
WO2005119528A3 (en) Loop manipulation in a behavioral synthesis tool
EP1693772A4 (de) Leiterplattenentwurfsverfahren, programm dafür, das programm enthaltendes aufzeichnungsmedium, leiterplattenentwurfseinrichtung damit und cad-system
ATE506645T1 (de) Verfahren und vorrichtung zur bereitstellung eines benutzerprioritätsmodus
WO2009055016A3 (en) Integrated circuit with optical interconnect
EP1674972A3 (de) Leistungssteuerungssystem
TW200943026A (en) Computer system and method for automatically overclocking
ATE491189T1 (de) Chipkarte und verfahren zum schützen einer chipkarte
ATE458333T1 (de) Routing-einrichtung für ein unterseeisches elektronikmodul
ATE516566T1 (de) Datenübertragung zwischen modulen
BR112013006724A2 (pt) aparelho, conjunto de circuitos integrados ou chips, dispositivo de posicionamento, método, programa de computador, e, sinal
TW200631025A (en) Method and system for timing measurement of embedded macro module
ATE386420T1 (de) Elektronische baugruppe und verfahren zu deren herstellung

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties