ATE473483T1 - Verschleierung von speicherzugriffsmustern - Google Patents

Verschleierung von speicherzugriffsmustern

Info

Publication number
ATE473483T1
ATE473483T1 AT07254933T AT07254933T ATE473483T1 AT E473483 T1 ATE473483 T1 AT E473483T1 AT 07254933 T AT07254933 T AT 07254933T AT 07254933 T AT07254933 T AT 07254933T AT E473483 T1 ATE473483 T1 AT E473483T1
Authority
AT
Austria
Prior art keywords
occasioning
memory access
access patterns
memory
memory location
Prior art date
Application number
AT07254933T
Other languages
English (en)
Inventor
Mark J Buxton
Ernest F Brickell
Quinn A Jacobson
Hong Wang
Baiju V Patel
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE473483T1 publication Critical patent/ATE473483T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0842—Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
    • G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30047—Prefetch instructions; cache control instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Storage Device Security (AREA)
  • Multi Processors (AREA)
  • Ceramic Products (AREA)
AT07254933T 2006-12-27 2007-12-18 Verschleierung von speicherzugriffsmustern ATE473483T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/646,642 US7610448B2 (en) 2006-12-27 2006-12-27 Obscuring memory access patterns

Publications (1)

Publication Number Publication Date
ATE473483T1 true ATE473483T1 (de) 2010-07-15

Family

ID=39314963

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07254933T ATE473483T1 (de) 2006-12-27 2007-12-18 Verschleierung von speicherzugriffsmustern

Country Status (5)

Country Link
US (2) US7610448B2 (de)
EP (1) EP1939752B1 (de)
CN (1) CN101231621B (de)
AT (1) ATE473483T1 (de)
DE (1) DE602007007566D1 (de)

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Also Published As

Publication number Publication date
DE602007007566D1 (de) 2010-08-19
US7610448B2 (en) 2009-10-27
CN101231621B (zh) 2011-10-19
US8078801B2 (en) 2011-12-13
US20080162816A1 (en) 2008-07-03
EP1939752B1 (de) 2010-07-07
CN101231621A (zh) 2008-07-30
EP1939752A1 (de) 2008-07-02
US20100299479A1 (en) 2010-11-25

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