ATE474271T1 - Dma-deskriptoren-warteschlangen-lese-und-cache- schreib-zeigeranordnung - Google Patents

Dma-deskriptoren-warteschlangen-lese-und-cache- schreib-zeigeranordnung

Info

Publication number
ATE474271T1
ATE474271T1 AT06785043T AT06785043T ATE474271T1 AT E474271 T1 ATE474271 T1 AT E474271T1 AT 06785043 T AT06785043 T AT 06785043T AT 06785043 T AT06785043 T AT 06785043T AT E474271 T1 ATE474271 T1 AT E474271T1
Authority
AT
Austria
Prior art keywords
descriptor
host memory
queue
descriptors
cache write
Prior art date
Application number
AT06785043T
Other languages
English (en)
Inventor
John Chiang
Ching Yu
David Riddoch
Derek Roberts
Steve Pope
Der-Ren Chu
Original Assignee
Solarflare Comm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Solarflare Comm Inc filed Critical Solarflare Comm Inc
Application granted granted Critical
Publication of ATE474271T1 publication Critical patent/ATE474271T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
AT06785043T 2005-06-17 2006-06-16 Dma-deskriptoren-warteschlangen-lese-und-cache- schreib-zeigeranordnung ATE474271T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/156,228 US7496699B2 (en) 2005-06-17 2005-06-17 DMA descriptor queue read and cache write pointer arrangement
PCT/US2006/023624 WO2006138649A1 (en) 2005-06-17 2006-06-16 Dma descriptor queue read and cache write pointer arrangement

Publications (1)

Publication Number Publication Date
ATE474271T1 true ATE474271T1 (de) 2010-07-15

Family

ID=37054721

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06785043T ATE474271T1 (de) 2005-06-17 2006-06-16 Dma-deskriptoren-warteschlangen-lese-und-cache- schreib-zeigeranordnung

Country Status (5)

Country Link
US (1) US7496699B2 (de)
EP (1) EP1896965B1 (de)
AT (1) ATE474271T1 (de)
DE (1) DE602006015470D1 (de)
WO (1) WO2006138649A1 (de)

Families Citing this family (100)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7895239B2 (en) * 2002-01-04 2011-02-22 Intel Corporation Queue arrays in network devices
US7920473B1 (en) * 2005-12-01 2011-04-05 Qlogic, Corporation Method and system for managing transmit descriptors in a networking system
US7792140B2 (en) * 2006-06-30 2010-09-07 Oracle America Inc. Reflecting the bandwidth assigned to a virtual network interface card through its link speed
US20080022079A1 (en) * 2006-07-24 2008-01-24 Archer Charles J Executing an allgather operation with an alltoallv operation in a parallel computer
US7594093B1 (en) * 2006-10-12 2009-09-22 Foundry Networks, Inc. Virtual memory mapping for efficient memory usage
US20080126622A1 (en) * 2006-11-28 2008-05-29 Eliezer Tamir Method and System for Optimizing CPU Performance for Network Ingress Flow
US8140826B2 (en) * 2007-05-29 2012-03-20 International Business Machines Corporation Executing a gather operation on a parallel computer
US8161480B2 (en) * 2007-05-29 2012-04-17 International Business Machines Corporation Performing an allreduce operation using shared memory
TWI334541B (en) * 2007-06-22 2010-12-11 Via Tech Inc Prd (physical region descriptor) pre-fetch methods for dma (direct memory access) unit
US20090006663A1 (en) * 2007-06-27 2009-01-01 Archer Charles J Direct Memory Access ('DMA') Engine Assisted Local Reduction
US20090083392A1 (en) * 2007-09-25 2009-03-26 Sun Microsystems, Inc. Simple, efficient rdma mechanism
US8959307B1 (en) 2007-11-16 2015-02-17 Bitmicro Networks, Inc. Reduced latency memory read transactions in storage devices
US7991857B2 (en) 2008-03-24 2011-08-02 International Business Machines Corporation Broadcasting a message in a parallel computer
US8122228B2 (en) * 2008-03-24 2012-02-21 International Business Machines Corporation Broadcasting collective operation contributions throughout a parallel computer
US8422402B2 (en) 2008-04-01 2013-04-16 International Business Machines Corporation Broadcasting a message in a parallel computer
US8375197B2 (en) * 2008-05-21 2013-02-12 International Business Machines Corporation Performing an allreduce operation on a plurality of compute nodes of a parallel computer
US8484440B2 (en) 2008-05-21 2013-07-09 International Business Machines Corporation Performing an allreduce operation on a plurality of compute nodes of a parallel computer
US8161268B2 (en) * 2008-05-21 2012-04-17 International Business Machines Corporation Performing an allreduce operation on a plurality of compute nodes of a parallel computer
US8281053B2 (en) 2008-07-21 2012-10-02 International Business Machines Corporation Performing an all-to-all data exchange on a plurality of data buffers by performing swap operations
US9514060B2 (en) * 2008-07-29 2016-12-06 Entropic Communications, Llc Device, system and method of accessing data stored in a memory
US8583839B2 (en) * 2009-11-30 2013-11-12 Lsi Corporation Context processing for multiple active write commands in a media controller architecture
US7970963B2 (en) * 2009-06-29 2011-06-28 Oracle America, Inc. Efficient buffer management in a multi-threaded network interface
US8665601B1 (en) 2009-09-04 2014-03-04 Bitmicro Networks, Inc. Solid state drive with improved enclosure assembly
US8447908B2 (en) 2009-09-07 2013-05-21 Bitmicro Networks, Inc. Multilevel memory bus system for solid-state mass storage
US8560804B2 (en) 2009-09-14 2013-10-15 Bitmicro Networks, Inc. Reducing erase cycles in an electronic storage device that uses at least one erase-limited memory device
US8589600B2 (en) * 2009-12-14 2013-11-19 Maxeler Technologies, Ltd. Method of transferring data with offsets
US8565089B2 (en) * 2010-03-29 2013-10-22 International Business Machines Corporation Performing a scatterv operation on a hierarchical tree network optimized for collective operations
US8307111B1 (en) 2010-04-13 2012-11-06 Qlogic, Corporation Systems and methods for bandwidth scavenging among a plurality of applications in a network
US8332460B2 (en) 2010-04-14 2012-12-11 International Business Machines Corporation Performing a local reduction operation on a parallel computer
US8510482B2 (en) * 2010-04-27 2013-08-13 Freescale Semiconductor, Inc. Data processing system having peripheral-paced DMA transfer and method therefor
US9424087B2 (en) 2010-04-29 2016-08-23 International Business Machines Corporation Optimizing collective operations
US8626963B2 (en) * 2010-05-04 2014-01-07 Mediatek Inc. Packet based data transfer system and method for host-slave interface
US8346883B2 (en) 2010-05-19 2013-01-01 International Business Machines Corporation Effecting hardware acceleration of broadcast operations in a parallel computer
US8489859B2 (en) 2010-05-28 2013-07-16 International Business Machines Corporation Performing a deterministic reduction operation in a compute node organized into a branched tree topology
US8949577B2 (en) 2010-05-28 2015-02-03 International Business Machines Corporation Performing a deterministic reduction operation in a parallel computer
US8776081B2 (en) 2010-09-14 2014-07-08 International Business Machines Corporation Send-side matching of data communications messages
TWI465905B (zh) 2010-09-22 2014-12-21 Toshiba Kk 記憶體系統、主機控制器、及直接記憶體存取之控制方法
CN101976229A (zh) * 2010-11-09 2011-02-16 北京星网锐捷网络技术有限公司 一种系统中外部设备的数据读取方法、系统及装置
US8566841B2 (en) 2010-11-10 2013-10-22 International Business Machines Corporation Processing communications events in parallel active messaging interface by awakening thread from wait state
US9239796B2 (en) * 2011-05-24 2016-01-19 Ixia Methods, systems, and computer readable media for caching and using scatter list metadata to control direct memory access (DMA) receiving of network protocol data
US8893083B2 (en) 2011-08-09 2014-11-18 International Business Machines Coporation Collective operation protocol selection in a parallel computer
US8910178B2 (en) 2011-08-10 2014-12-09 International Business Machines Corporation Performing a global barrier operation in a parallel computer
US9372755B1 (en) 2011-10-05 2016-06-21 Bitmicro Networks, Inc. Adaptive power cycle sequences for data recovery
CN102520911B (zh) * 2011-12-19 2015-04-29 曙光信息产业(北京)有限公司 一种优化收包设备上的软件操作pci空间寄存器效率的系统和方法
US9495135B2 (en) 2012-02-09 2016-11-15 International Business Machines Corporation Developing collective operations for a parallel computer
US9043669B1 (en) 2012-05-18 2015-05-26 Bitmicro Networks, Inc. Distributed ECC engine for storage media
US9256555B2 (en) * 2012-12-20 2016-02-09 Oracle International Corporation Method and system for queue descriptor cache management for a host channel adapter
KR101861744B1 (ko) * 2013-02-28 2018-05-29 삼성전자주식회사 데이터 블록 오프셋에 기초하여 버퍼 디스크립터의 타겟 엔트리 어드레스를 계산할 수 있는 집적 회로와 상기 집적 회로를 포함하는 시스템
US9423457B2 (en) 2013-03-14 2016-08-23 Bitmicro Networks, Inc. Self-test solution for delay locked loops
US9934045B1 (en) 2013-03-15 2018-04-03 Bitmicro Networks, Inc. Embedded system boot from a storage device
US9430386B2 (en) 2013-03-15 2016-08-30 Bitmicro Networks, Inc. Multi-leveled cache management in a hybrid storage system
US9798688B1 (en) 2013-03-15 2017-10-24 Bitmicro Networks, Inc. Bus arbitration with routing and failover mechanism
US9875205B1 (en) 2013-03-15 2018-01-23 Bitmicro Networks, Inc. Network of memory systems
US9288163B2 (en) * 2013-03-15 2016-03-15 Avago Technologies General Ip (Singapore) Pte. Ltd. Low-latency packet receive method for networking devices
US10489318B1 (en) 2013-03-15 2019-11-26 Bitmicro Networks, Inc. Scatter-gather approach for parallel data transfer in a mass storage system
US9672178B1 (en) 2013-03-15 2017-06-06 Bitmicro Networks, Inc. Bit-mapped DMA transfer with dependency table configured to monitor status so that a processor is not rendered as a bottleneck in a system
US9501436B1 (en) 2013-03-15 2016-11-22 Bitmicro Networks, Inc. Multi-level message passing descriptor
US9400617B2 (en) 2013-03-15 2016-07-26 Bitmicro Networks, Inc. Hardware-assisted DMA transfer with dependency table configured to permit-in parallel-data drain from cache without processor intervention when filled or drained
US10394751B2 (en) 2013-11-06 2019-08-27 Solarflare Communications, Inc. Programmed input/output mode
KR101572689B1 (ko) * 2014-01-06 2015-11-27 (주)구름네트웍스 네트워크 인터페이스 가상화 장치 및 방법
US9952991B1 (en) * 2014-04-17 2018-04-24 Bitmicro Networks, Inc. Systematic method on queuing of descriptors for multiple flash intelligent DMA engine operation
US10025736B1 (en) 2014-04-17 2018-07-17 Bitmicro Networks, Inc. Exchange message protocol message transmission between two devices
US10042792B1 (en) 2014-04-17 2018-08-07 Bitmicro Networks, Inc. Method for transferring and receiving frames across PCI express bus for SSD device
US10078604B1 (en) 2014-04-17 2018-09-18 Bitmicro Networks, Inc. Interrupt coalescing
DE102014207417A1 (de) * 2014-04-17 2015-10-22 Robert Bosch Gmbh Schnittstelleneinheit
US10055150B1 (en) 2014-04-17 2018-08-21 Bitmicro Networks, Inc. Writing volatile scattered memory metadata to flash device
WO2016003646A1 (en) * 2014-06-30 2016-01-07 Unisys Corporation Enterprise management for secure network communications over ipsec
US11044183B2 (en) 2015-12-29 2021-06-22 Xilinx, Inc. Network interface device
US11165683B2 (en) 2015-12-29 2021-11-02 Xilinx, Inc. Network interface device
WO2017209876A1 (en) 2016-05-31 2017-12-07 Brocade Communications Systems, Inc. Buffer manager
KR102683696B1 (ko) 2016-11-15 2024-07-09 삼성전자주식회사 호스트 메모리 버퍼(Host Memory Buffer)를 관리하기 위한 NVMe(Non-Volatile Memory　Express) 컨트롤러를 포함하는 솔리드 스테이트 저장 장치(solid state storage device), 이를 포함하는 시스템 및 호스트의 호스트 메모리 버퍼를 관리하는 방법
US10241946B2 (en) * 2017-01-18 2019-03-26 Nxp Usa, Inc. Multi-channel DMA system with command queue structure supporting three DMA modes
US10552050B1 (en) 2017-04-07 2020-02-04 Bitmicro Llc Multi-dimensional computer storage system
US10298496B1 (en) * 2017-09-26 2019-05-21 Amazon Technologies, Inc. Packet processing cache
US10536561B2 (en) 2017-10-16 2020-01-14 Cisco Technology, Inc. Data stream pipelining and replication at a delivery node of a content delivery network
KR20190086177A (ko) * 2018-01-12 2019-07-22 에스케이하이닉스 주식회사 컨트롤러 및 그것의 동작방법
CN110554977A (zh) * 2018-05-30 2019-12-10 阿里巴巴集团控股有限公司 数据缓存方法、数据处理方法、计算机设备、存储介质
US11593291B2 (en) 2018-09-10 2023-02-28 GigaIO Networks, Inc. Methods and apparatus for high-speed data bus connection and fabric management
US11403247B2 (en) * 2019-09-10 2022-08-02 GigaIO Networks, Inc. Methods and apparatus for network interface fabric send/receive operations
US11593288B2 (en) 2019-10-02 2023-02-28 GigalO Networks, Inc. Methods and apparatus for fabric interface polling
US11392528B2 (en) 2019-10-25 2022-07-19 Cigaio Networks, Inc. Methods and apparatus for DMA engine descriptors for high speed data systems
CN111338999B (zh) * 2020-02-20 2021-05-28 南京芯驰半导体科技有限公司 直接存储器存取dma系统及数据传输方法
US11258887B2 (en) * 2020-06-22 2022-02-22 Mellanox Technologies, Ltd. Payload cache
CN113079113B (zh) * 2021-03-30 2022-03-15 扬州万方电子技术有限责任公司 数据传输装置和数据传输系统
CN113254374B (zh) * 2021-05-07 2024-11-08 黑芝麻智能科技(上海)有限公司 直接内存访问dma访问数据的方法、处理器
CN113609041B (zh) * 2021-06-20 2025-02-07 山东云海国创云计算装备产业创新中心有限公司 一种数据传输方法及系统
CN113535395B (zh) * 2021-07-14 2024-09-06 西安电子科技大学 网络存储业务的描述符队列和内存优化方法、系统及应用
CN113986791B (zh) * 2021-09-13 2024-02-02 西安电子科技大学 一种智能网卡快速dma设计方法、系统、设备及终端
US20230161725A1 (en) * 2021-11-23 2023-05-25 Meta Platforms, Inc. Smart scalable design for a crossbar
CN114416613A (zh) * 2021-12-29 2022-04-29 苏州雄立科技有限公司 一种dma数据传输系统及方法
CN114237945B (zh) * 2022-02-25 2022-05-13 四川鸿创电子科技有限公司 一种基于srio接口的互联系统消息处理方法、装置和介质
CN115914424B (zh) * 2022-11-10 2025-01-28 深圳市汇川技术股份有限公司 网络数据实时传输方法、装置、设备及可读存储介质
CN116166605B (zh) * 2023-04-26 2023-07-25 太初(无锡)电子科技有限公司 数据混合传输方法、装置、dma控制器、介质及系统
CN116185892B (zh) * 2023-04-27 2023-07-21 珠海妙存科技有限公司 闪存控制器及其访问闪存颗粒的方法
CN116627869B (zh) * 2023-05-31 2024-06-07 重庆赛力斯凤凰智创科技有限公司 应用于电子设备的数据传输方法及装置
US12346271B2 (en) * 2023-06-16 2025-07-01 Ciena Corporation Pointer sharing in QDMA transactions
CN116827880B (zh) * 2023-08-29 2023-11-17 珠海星云智联科技有限公司 一种缓存空间管理方法及装置
CN116991609B (zh) * 2023-09-26 2024-01-16 珠海星云智联科技有限公司 队列公平处理方法、设备以及可读存储介质
CN119045947B (zh) * 2024-08-12 2025-11-18 中科驭数（北京）科技有限公司 一种用于DPU的VirtIO设备的链式描述符管理方法及装置
WO2026085147A1 (en) * 2024-10-14 2026-04-23 Marvell Asia Pte Ltd Method to improve packet rate using packet bundle mode to transmit a vector of packets in a single job

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5434872A (en) 1992-07-28 1995-07-18 3Com Corporation Apparatus for automatic initiation of data transmission
US6049842A (en) 1997-05-01 2000-04-11 International Business Machines Corporation Efficient data transfer mechanism for input/output devices
US6397316B2 (en) 1997-07-24 2002-05-28 Intel Corporation System for reducing bus overhead for communication with a network interface
US6567859B1 (en) 1999-04-27 2003-05-20 3Com Corporation Device for translating medium access control dependent descriptors for a high performance network
US6581113B1 (en) 1999-12-29 2003-06-17 Advanced Micro Devices, Inc. Apparatus and method for transferring frame data between a host system memory and a network interface buffer memory employing transmit descriptors without transmit status information
US7307998B1 (en) * 2002-08-27 2007-12-11 3Com Corporation Computer system and network interface supporting dynamically optimized receive buffer queues
GB0221464D0 (en) 2002-09-16 2002-10-23 Cambridge Internetworking Ltd Network interface and protocol
GB0404696D0 (en) 2004-03-02 2004-04-07 Level 5 Networks Ltd Dual driver interface

Also Published As

Publication number Publication date
US7496699B2 (en) 2009-02-24
US20060288129A1 (en) 2006-12-21
DE602006015470D1 (de) 2010-08-26
EP1896965B1 (de) 2010-07-14
WO2006138649A1 (en) 2006-12-28
EP1896965A1 (de) 2008-03-12

Similar Documents

Publication Publication Date Title
ATE474271T1 (de) Dma-deskriptoren-warteschlangen-lese-und-cache- schreib-zeigeranordnung
CN109815172B (zh) 设备控制器以及包括其的储存设备
KR101352721B1 (ko) 온다이 시스템 패브릭 블록의 제어 장치, 방법 및 시스템
CN106796562B (zh) 在虚拟化计算环境中路由直接存储器存取请求
JP6768928B2 (ja) アドレスを圧縮するための方法及び装置
JP2016517992A5 (de)
US8185717B2 (en) Apparatus and method for profiling software performance on a processor with non-unique virtual addresses
JP2013543195A (ja) ディスプレイパイプにおけるストリーミング式翻訳
US9721569B2 (en) Gaussian mixture model accelerator with direct memory access engines corresponding to individual data streams
TW201710910A (zh) 交易式混合記憶體模組及其操作方法
US9423979B2 (en) Memory system and memory controller for determining whether one or plurality of pointers can be stored in a second buffer and for executing data transfer between data buffer and host using the pointers
EP1868075A3 (de) System und Verfahren für Speichervirtualisierung
JP2015527661A5 (de)
EP2447829A3 (de) Vorabrufanweisung
JP2017501504A (ja) メモリをデフラグするシステムおよび方法
RU2012150102A (ru) Применение косвенных адресных слов данных расширенной схемы асинхронного перемещения данных
CN104021090A (zh) 集成电路及其操作方法以及包括集成电路的系统
JP2019133662A5 (de)
TWI405081B (zh) 對共享第二層對映快取記憶體對稱配置之方法與系統
JP2007287143A (ja) Ｉ／ｏアドレス変換キャッシュ・ミスのソフトウェア・ミス処理用ハードウェア支援エクセプション
CN104516826B (zh) 一种虚拟大页面与物理大页面的对应方法及装置
US9201825B1 (en) Data storage methods and apparatus
CN105426116B (zh) 控制器及存储器存取方法
ATE504039T1 (de) Hardwaregetriggerte daten-cacheleitungs- vorzuteilung
CN102713868A (zh) 存取二级存储器的一部分及一级存储器的系统及方法

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties