ATE479941T1 - Adaptive regelung von speicherzugriffen, zum beispiel regelung von rdram-zugriffen in einem echtzeitsystem - Google Patents

Adaptive regelung von speicherzugriffen, zum beispiel regelung von rdram-zugriffen in einem echtzeitsystem

Info

Publication number
ATE479941T1
ATE479941T1 AT01971304T AT01971304T ATE479941T1 AT E479941 T1 ATE479941 T1 AT E479941T1 AT 01971304 T AT01971304 T AT 01971304T AT 01971304 T AT01971304 T AT 01971304T AT E479941 T1 ATE479941 T1 AT E479941T1
Authority
AT
Austria
Prior art keywords
memory
access
throttle
mask
monitoring window
Prior art date
Application number
AT01971304T
Other languages
English (en)
Inventor
Opher D Kahn
Erez Birenzwig
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE479941T1 publication Critical patent/ATE479941T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3275Power saving in memory, e.g. RAM, cache
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/20Cooling means
    • G06F1/206Cooling means comprising thermal management
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/225Clock input buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/04Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Human Computer Interaction (AREA)
  • Debugging And Monitoring (AREA)
  • Dram (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Circuits Of Receivers In General (AREA)
AT01971304T 2000-09-22 2001-09-20 Adaptive regelung von speicherzugriffen, zum beispiel regelung von rdram-zugriffen in einem echtzeitsystem ATE479941T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/667,649 US6662278B1 (en) 2000-09-22 2000-09-22 Adaptive throttling of memory acceses, such as throttling RDRAM accesses in a real-time system
PCT/US2001/029694 WO2002025448A2 (en) 2000-09-22 2001-09-20 Adaptive throttling of memory accesses, such as throttling rdram accesses in a real-time system

Publications (1)

Publication Number Publication Date
ATE479941T1 true ATE479941T1 (de) 2010-09-15

Family

ID=24679046

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01971304T ATE479941T1 (de) 2000-09-22 2001-09-20 Adaptive regelung von speicherzugriffen, zum beispiel regelung von rdram-zugriffen in einem echtzeitsystem

Country Status (7)

Country Link
US (2) US6662278B1 (de)
EP (1) EP1360590B1 (de)
CN (2) CN1975634B (de)
AT (1) ATE479941T1 (de)
AU (1) AU2001291203A1 (de)
DE (1) DE60142986D1 (de)
WO (1) WO2002025448A2 (de)

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Also Published As

Publication number Publication date
WO2002025448A3 (en) 2003-07-10
CN1975634A (zh) 2007-06-06
CN100350400C (zh) 2007-11-21
US20040019738A1 (en) 2004-01-29
US7418561B2 (en) 2008-08-26
EP1360590B1 (de) 2010-09-01
AU2001291203A1 (en) 2002-04-02
EP1360590A2 (de) 2003-11-12
CN1975634B (zh) 2010-05-19
DE60142986D1 (de) 2010-10-14
WO2002025448A2 (en) 2002-03-28
US6662278B1 (en) 2003-12-09
CN1537280A (zh) 2004-10-13

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