ATE483275T1 - Klemmschaltung zur bekämpfung von parasitärer kopplung - Google Patents

Klemmschaltung zur bekämpfung von parasitärer kopplung

Info

Publication number
ATE483275T1
ATE483275T1 AT04731701T AT04731701T ATE483275T1 AT E483275 T1 ATE483275 T1 AT E483275T1 AT 04731701 T AT04731701 T AT 04731701T AT 04731701 T AT04731701 T AT 04731701T AT E483275 T1 ATE483275 T1 AT E483275T1
Authority
AT
Austria
Prior art keywords
aggressor
victim wire
wires
signal
clamping circuit
Prior art date
Application number
AT04731701T
Other languages
English (en)
Inventor
Atul Katoch
Rinze Meijer
Sanjee Jain
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE483275T1 publication Critical patent/ATE483275T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/08—Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults
    • H04L25/085—Arrangements for reducing interference in line transmission systems, e.g. by differential transmission

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Nonlinear Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Signal Processing (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Manipulation Of Pulses (AREA)
  • Switches With Compound Operations (AREA)
  • Keying Circuit Devices (AREA)
  • Driving Mechanisms And Operating Circuits Of Arc-Extinguishing High-Tension Switches (AREA)
AT04731701T 2003-05-12 2004-05-07 Klemmschaltung zur bekämpfung von parasitärer kopplung ATE483275T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP03101313 2003-05-12
PCT/IB2004/050616 WO2004100377A1 (en) 2003-05-12 2004-05-07 Clamping circuit to counter parasitic coupling

Publications (1)

Publication Number Publication Date
ATE483275T1 true ATE483275T1 (de) 2010-10-15

Family

ID=33427216

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04731701T ATE483275T1 (de) 2003-05-12 2004-05-07 Klemmschaltung zur bekämpfung von parasitärer kopplung

Country Status (7)

Country Link
US (1) US7429885B2 (de)
EP (1) EP1625661B1 (de)
JP (1) JP4473862B2 (de)
CN (1) CN100375389C (de)
AT (1) ATE483275T1 (de)
DE (1) DE602004029352D1 (de)
WO (1) WO2004100377A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8250295B2 (en) 2004-01-05 2012-08-21 Smart Modular Technologies, Inc. Multi-rank memory module that emulates a memory module having a different number of ranks
US7337419B2 (en) * 2004-07-29 2008-02-26 Stmicroelectronics, Inc. Crosstalk noise reduction circuit and method
US8154901B1 (en) * 2008-04-14 2012-04-10 Netlist, Inc. Circuit providing load isolation and noise reduction

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0758367B2 (ja) * 1987-11-20 1995-06-21 旭光学工業株式会社 焦点検出装置の光学系
JPH0284817A (ja) 1988-09-20 1990-03-26 Nec Corp 集積回路
KR0137105B1 (ko) * 1993-06-17 1998-04-29 모리시다 요이치 데이터 전송회로, 데이터선 구동회로, 증폭회로, 반도체 집적회로 및 반도체 기억장치
US5684429A (en) * 1995-09-14 1997-11-04 Ncr Corporation CMOS gigabit serial link differential transmitter and receiver
US5920223A (en) * 1996-12-12 1999-07-06 Xilinx, Inc. Method and apparatus to improve immunity to common-mode noise
US5900766A (en) * 1997-07-11 1999-05-04 Hewlett-Packard Company Coupling charge compensation device for VLSI circuits
US6515345B2 (en) * 2001-02-21 2003-02-04 Semiconductor Components Industries Llc Transient voltage suppressor with diode overlaying another diode for conserving space
US7116851B2 (en) * 2001-10-09 2006-10-03 Infinera Corporation Optical signal receiver, an associated photonic integrated circuit (RxPIC), and method improving performance
US7057475B2 (en) * 2003-10-22 2006-06-06 Adc Dsl Systems, Inc. Ferrite choke

Also Published As

Publication number Publication date
WO2004100377A1 (en) 2004-11-18
DE602004029352D1 (de) 2010-11-11
EP1625661A1 (de) 2006-02-15
US7429885B2 (en) 2008-09-30
JP4473862B2 (ja) 2010-06-02
US20070013429A1 (en) 2007-01-18
CN100375389C (zh) 2008-03-12
CN1788418A (zh) 2006-06-14
EP1625661B1 (de) 2010-09-29
JP2006526336A (ja) 2006-11-16

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Legal Events

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