ATE497651T1 - Elektronische schaltung - Google Patents
Elektronische schaltungInfo
- Publication number
- ATE497651T1 ATE497651T1 AT07735461T AT07735461T ATE497651T1 AT E497651 T1 ATE497651 T1 AT E497651T1 AT 07735461 T AT07735461 T AT 07735461T AT 07735461 T AT07735461 T AT 07735461T AT E497651 T1 ATE497651 T1 AT E497651T1
- Authority
- AT
- Austria
- Prior art keywords
- transistor
- voltage
- coupled
- node
- output
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Oscillators With Electromechanical Resonators (AREA)
- Air Bags (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP06112522 | 2006-04-12 | ||
| PCT/IB2007/051296 WO2007116378A2 (en) | 2006-04-12 | 2007-04-11 | Electronic circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE497651T1 true ATE497651T1 (de) | 2011-02-15 |
Family
ID=38581472
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT07735461T ATE497651T1 (de) | 2006-04-12 | 2007-04-11 | Elektronische schaltung |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7741874B2 (de) |
| EP (1) | EP2011236B1 (de) |
| JP (1) | JP2009533929A (de) |
| CN (1) | CN101421926A (de) |
| AT (1) | ATE497651T1 (de) |
| DE (1) | DE602007012341D1 (de) |
| WO (1) | WO2007116378A2 (de) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8354874B1 (en) * | 2009-05-15 | 2013-01-15 | Marvell International Ltd. | Kickback cancellation in class B type circuits using AC coupling |
| US8310283B2 (en) * | 2009-10-29 | 2012-11-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Over-drive circuit having stacked transistors |
| JP2015216497A (ja) * | 2014-05-09 | 2015-12-03 | 株式会社東芝 | 増幅回路、積分回路及びad変換器 |
| KR102242582B1 (ko) | 2014-10-10 | 2021-04-22 | 삼성전자주식회사 | 수신 회로 및 그것의 신호 수신 방법 |
| US9917588B2 (en) * | 2015-07-08 | 2018-03-13 | Nxp B.V. | Level shifter and approach therefor |
| WO2021171482A1 (ja) * | 2020-02-27 | 2021-09-02 | 株式会社ソシオネクスト | 出力回路、送信回路及び半導体集積回路 |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5194767A (en) * | 1990-12-19 | 1993-03-16 | Texas Instruments Incorporated | TTL compatible hysteresis input buffer with improvable AC margin |
| US5465054A (en) * | 1994-04-08 | 1995-11-07 | Vivid Semiconductor, Inc. | High voltage CMOS logic using low voltage CMOS process |
| US5414314A (en) * | 1994-06-09 | 1995-05-09 | Maxim Integrated Products | High swing interface stage |
| US5604449A (en) * | 1996-01-29 | 1997-02-18 | Vivid Semiconductor, Inc. | Dual I/O logic for high voltage CMOS circuit using low voltage CMOS processes |
| US5892371A (en) * | 1996-02-12 | 1999-04-06 | Advanced Micro Devices, Inc. | Gate oxide voltage limiting devices for digital circuits |
| KR100226486B1 (ko) * | 1996-12-21 | 1999-10-15 | 김영환 | 고출력 전압 생성용 반도체 회로 |
| JP2993462B2 (ja) * | 1997-04-18 | 1999-12-20 | 日本電気株式会社 | 出力バッファ回路 |
| KR100237898B1 (ko) * | 1997-07-10 | 2000-01-15 | 김영환 | 고출력 전압 생성용 반도체 회로 |
| EP1086531B1 (de) * | 1998-06-04 | 2003-02-26 | Infineon Technologies AG | Logikgatter |
| US6147540A (en) * | 1998-08-31 | 2000-11-14 | Motorola Inc. | High voltage input buffer made by a low voltage process and having a self-adjusting trigger point |
| CA2377896A1 (en) * | 1999-06-29 | 2001-01-11 | Cochlear Limited | High voltage protection circuit on standard cmos process |
| US6407579B1 (en) * | 2000-01-20 | 2002-06-18 | Koninklijke Philips Electronics N.V. | Fast high voltage level shifter with gate oxide protection |
| JP3688572B2 (ja) * | 2000-09-28 | 2005-08-31 | 株式会社東芝 | 半導体集積回路 |
| US6693469B2 (en) * | 2001-05-01 | 2004-02-17 | Lucent Technologies Inc. | Buffer interface architecture |
| US6529082B1 (en) * | 2001-10-11 | 2003-03-04 | International Business Machines Corporation | Dual mode charge pump |
| US6650156B1 (en) * | 2002-08-29 | 2003-11-18 | Integrated Device Technology, Inc. | Integrated circuit charge pumps having control circuits therein that inhibit parasitic charge injection from control signals |
| US7190191B1 (en) * | 2003-02-24 | 2007-03-13 | Cypress Semiconductor Corporation | Over-voltage tolerant input buffer having hot-plug capability |
| US7224195B2 (en) * | 2003-12-11 | 2007-05-29 | Integrated Device Technology, Inc. | Output drive circuit that accommodates variable supply voltages |
| JP4114751B2 (ja) * | 2004-03-31 | 2008-07-09 | シャープ株式会社 | 半導体装置 |
| US7282953B2 (en) * | 2005-09-08 | 2007-10-16 | Faraday Technology Corp. | Pre-buffer level shifter and input/output buffer apparatus |
| US7639059B1 (en) * | 2007-09-12 | 2009-12-29 | National Semiconductor Corporation | Fast settling reference voltage buffer with wide reference range |
-
2007
- 2007-04-11 CN CNA2007800132973A patent/CN101421926A/zh active Pending
- 2007-04-11 JP JP2009504886A patent/JP2009533929A/ja not_active Withdrawn
- 2007-04-11 US US12/297,004 patent/US7741874B2/en not_active Expired - Fee Related
- 2007-04-11 WO PCT/IB2007/051296 patent/WO2007116378A2/en not_active Ceased
- 2007-04-11 AT AT07735461T patent/ATE497651T1/de not_active IP Right Cessation
- 2007-04-11 EP EP07735461A patent/EP2011236B1/de not_active Not-in-force
- 2007-04-11 DE DE602007012341T patent/DE602007012341D1/de active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN101421926A (zh) | 2009-04-29 |
| DE602007012341D1 (de) | 2011-03-17 |
| US7741874B2 (en) | 2010-06-22 |
| WO2007116378A2 (en) | 2007-10-18 |
| US20090261860A1 (en) | 2009-10-22 |
| EP2011236B1 (de) | 2011-02-02 |
| EP2011236A2 (de) | 2009-01-07 |
| JP2009533929A (ja) | 2009-09-17 |
| WO2007116378A3 (en) | 2008-03-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |