ATE498947T1 - Codierung und decodierung von nichtbinären ldpc codes - Google Patents

Codierung und decodierung von nichtbinären ldpc codes

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Publication number
ATE498947T1
ATE498947T1 AT08834845T AT08834845T ATE498947T1 AT E498947 T1 ATE498947 T1 AT E498947T1 AT 08834845 T AT08834845 T AT 08834845T AT 08834845 T AT08834845 T AT 08834845T AT E498947 T1 ATE498947 T1 AT E498947T1
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Austria
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nodes
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code
string
encoded
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Application number
AT08834845T
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English (en)
Inventor
Adrian Voicila
David Declercq
Marc Fossorier
Francois Verdier
Pascal Urard
Original Assignee
St Microelectronics Sa
Centre Nat Rech Scient
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Application filed by St Microelectronics Sa, Centre Nat Rech Scient filed Critical St Microelectronics Sa
Application granted granted Critical
Publication of ATE498947T1 publication Critical patent/ATE498947T1/de

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/1171—Parity-check or generator matrices with non-binary elements, e.g. for non-binary LDPC codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1134—Full parallel processing, i.e. all bit nodes or check nodes are processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/114—Shuffled, staggered, layered or turbo decoding schedules
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
AT08834845T 2007-09-10 2008-09-02 Codierung und decodierung von nichtbinären ldpc codes ATE498947T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0757457A FR2920929B1 (fr) 2007-09-10 2007-09-10 Procede et dispositif d'encodage de symboles avec un code du type a controle de parite et procede et dispositif correspondants de decodage
PCT/FR2008/051558 WO2009044031A1 (fr) 2007-09-10 2008-09-02 Procede et dispositif d'encodage de symboles avec un code du type a contrôle de parite et procede et dispositif correspondants de decodage

Publications (1)

Publication Number Publication Date
ATE498947T1 true ATE498947T1 (de) 2011-03-15

Family

ID=39052420

Family Applications (1)

Application Number Title Priority Date Filing Date
AT08834845T ATE498947T1 (de) 2007-09-10 2008-09-02 Codierung und decodierung von nichtbinären ldpc codes

Country Status (10)

Country Link
US (1) US8627153B2 (de)
EP (1) EP2198523B1 (de)
JP (1) JP2010539744A (de)
KR (1) KR20100066514A (de)
CN (1) CN101803209A (de)
AT (1) ATE498947T1 (de)
CA (1) CA2696834A1 (de)
DE (1) DE602008005045D1 (de)
FR (1) FR2920929B1 (de)
WO (1) WO2009044031A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2950209B1 (fr) 2009-09-14 2011-10-14 St Microelectronics Sa Procede de mise a jour elementaire d'un noeud de controle lors d'un decodage d'un bloc encode avec un code ldpc non binaire, et decodeur correspondant.
US8479082B2 (en) * 2010-04-07 2013-07-02 Indian Institute Of Technology Delhi Packet error correction in networks
ITTO20110477A1 (it) * 2011-05-31 2012-12-01 Torino Politecnico Metodo per aggiornare un grafo di fattori di uno stimatore di probabilita' a posteriori.
FR2982446A1 (fr) 2011-11-07 2013-05-10 France Telecom Procede de codage et decodage d'images, dispositif de codage et decodage et programmes d'ordinateur correspondants
FR2982447A1 (fr) 2011-11-07 2013-05-10 France Telecom Procede de codage et decodage d'images, dispositif de codage et decodage et programmes d'ordinateur correspondants
US9602141B2 (en) 2014-04-21 2017-03-21 Sandisk Technologies Llc High-speed multi-block-row layered decoder for low density parity check (LDPC) codes
US9748973B2 (en) 2014-04-22 2017-08-29 Sandisk Technologies Llc Interleaved layered decoder for low-density parity check codes
US9503125B2 (en) * 2014-05-08 2016-11-22 Sandisk Technologies Llc Modified trellis-based min-max decoder for non-binary low-density parity-check error-correcting codes
US9876511B2 (en) 2015-09-11 2018-01-23 Toshiba Memory Corporation Memory system and memory control method
US10540398B2 (en) * 2017-04-24 2020-01-21 Oracle International Corporation Multi-source breadth-first search (MS-BFS) technique and graph processing system that applies it
JP2019057806A (ja) 2017-09-20 2019-04-11 東芝メモリ株式会社 メモリシステム

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100594818B1 (ko) * 2004-04-13 2006-07-03 한국전자통신연구원 순차적 복호를 이용한 저밀도 패리티 검사 부호의 복호장치 및 그 방법
KR100975558B1 (ko) * 2006-05-03 2010-08-13 삼성전자주식회사 통신 시스템에서 신호 송수신 장치 및 방법
EP2139119A1 (de) * 2008-06-25 2009-12-30 Thomson Licensing Serielle Verkettung von trelliskodierter Modulation und einem inneren nicht-binären LDPC Kode
US8479082B2 (en) * 2010-04-07 2013-07-02 Indian Institute Of Technology Delhi Packet error correction in networks

Also Published As

Publication number Publication date
FR2920929B1 (fr) 2009-11-13
US8627153B2 (en) 2014-01-07
CN101803209A (zh) 2010-08-11
DE602008005045D1 (de) 2011-03-31
FR2920929A1 (fr) 2009-03-13
JP2010539744A (ja) 2010-12-16
KR20100066514A (ko) 2010-06-17
EP2198523A1 (de) 2010-06-23
WO2009044031A1 (fr) 2009-04-09
US20120173947A1 (en) 2012-07-05
CA2696834A1 (fr) 2009-04-09
EP2198523B1 (de) 2011-02-16

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