ATE507504T1 - Verbesserung der prozessmodellgenauigkeit durch simulation von maskenecken-rundungseffekten - Google Patents

Verbesserung der prozessmodellgenauigkeit durch simulation von maskenecken-rundungseffekten

Info

Publication number
ATE507504T1
ATE507504T1 AT07866063T AT07866063T ATE507504T1 AT E507504 T1 ATE507504 T1 AT E507504T1 AT 07866063 T AT07866063 T AT 07866063T AT 07866063 T AT07866063 T AT 07866063T AT E507504 T1 ATE507504 T1 AT E507504T1
Authority
AT
Austria
Prior art keywords
process model
mask
corner rounding
model accuracy
improve process
Prior art date
Application number
AT07866063T
Other languages
English (en)
Inventor
Jensheng Huang
Chun-Chieh Kuo
Lawrence S Melvin
Original Assignee
Synopsys Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Synopsys Inc filed Critical Synopsys Inc
Application granted granted Critical
Publication of ATE507504T1 publication Critical patent/ATE507504T1/de

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70653—Metrology techniques
    • G03F7/70675—Latent image, i.e. measuring the image of the exposed resist prior to development
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G03F7/70441—Optical proximity correction [OPC]
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
    • G03F7/705—Modelling or simulating from physical phenomena up to complete wafer processes or whole workflow in wafer productions
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Electron Beam Exposure (AREA)
AT07866063T 2007-09-28 2007-12-27 Verbesserung der prozessmodellgenauigkeit durch simulation von maskenecken-rundungseffekten ATE507504T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/863,624 US7707539B2 (en) 2007-09-28 2007-09-28 Facilitating process model accuracy by modeling mask corner rounding effects
PCT/US2007/088957 WO2009041987A1 (en) 2007-09-28 2007-12-27 Improving process model accuracy by modeling mask corner rounding effects

Publications (1)

Publication Number Publication Date
ATE507504T1 true ATE507504T1 (de) 2011-05-15

Family

ID=39687349

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07866063T ATE507504T1 (de) 2007-09-28 2007-12-27 Verbesserung der prozessmodellgenauigkeit durch simulation von maskenecken-rundungseffekten

Country Status (8)

Country Link
US (2) US7707539B2 (de)
EP (1) EP2198343B1 (de)
JP (1) JP5306357B2 (de)
CN (1) CN101675385B (de)
AT (1) ATE507504T1 (de)
DE (1) DE602007014269D1 (de)
TW (1) TWI456420B (de)
WO (1) WO2009041987A1 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7016539B1 (en) * 1998-07-13 2006-03-21 Cognex Corporation Method for fast, robust, multi-dimensional pattern recognition
US8081820B2 (en) 2003-07-22 2011-12-20 Cognex Technology And Investment Corporation Method for partitioning a pattern into optimized sub-patterns
US8161438B2 (en) 2003-10-21 2012-04-17 Mentor Graphics Corporation Determining mutual inductance between intentional inductors
US7496871B2 (en) 2003-10-21 2009-02-24 Roberto Suaya Mutual inductance extraction using dipole approximations
WO2009114483A1 (en) 2008-03-08 2009-09-17 Mentor Graphics Corporation High-frequency vlsi interconnect and intentional inductor impedance extraction in the presence of a multi-layer conductive substrate
US8184897B2 (en) * 2008-10-02 2012-05-22 Synopsys, Inc. Method and apparatus for determining an optical threshold and a resist bias
US8146025B2 (en) * 2009-07-30 2012-03-27 United Microelectronics Corp. Method for correcting layout pattern using rule checking rectangle
US8255838B2 (en) * 2010-01-15 2012-08-28 Synopsys, Inc. Etch-aware OPC model calibration by using an etch bias filter
US8336003B2 (en) 2010-02-19 2012-12-18 International Business Machines Corporation Method for designing optical lithography masks for directed self-assembly
JP5672921B2 (ja) * 2010-10-06 2015-02-18 大日本印刷株式会社 パターン形状予測プログラム、パターン形状予測システム
KR20120090362A (ko) * 2011-02-07 2012-08-17 삼성전자주식회사 마스크 레이아웃 보정 방법 및 장치
US9114487B2 (en) * 2012-05-29 2015-08-25 Apple Inc. Components of an electronic device and methods for their assembly
US9679224B2 (en) 2013-06-28 2017-06-13 Cognex Corporation Semi-supervised method for training multiple pattern recognition and registration tool models
CN104882373B (zh) * 2015-04-24 2018-05-15 石以瑄 晶体管t形栅的制造方法
KR102519190B1 (ko) * 2015-11-19 2023-04-10 삼성전자주식회사 반도체 소자의 제조 방법
US9929023B2 (en) 2015-11-19 2018-03-27 Samsung Electronics Co., Ltd. Method of manufacturing semiconductor device
US10354373B2 (en) 2017-04-26 2019-07-16 Kla-Tencor Corporation System and method for photomask alignment and orientation characterization based on notch detection
CN107479331B (zh) * 2017-07-31 2020-05-15 上海华力微电子有限公司 一种图形转角的opc修正方法
CN108565213B (zh) * 2018-01-26 2020-07-07 成都海威华芯科技有限公司 一种高电子迁移率晶体管t形栅的制造方法
CN109143773B (zh) * 2018-10-16 2022-05-27 上海华力微电子有限公司 一种光学临近修正前的预处理方法
KR102688569B1 (ko) * 2018-12-13 2024-07-25 삼성전자주식회사 마스크 레이아웃 설계 방법, opc 방법, 및 그 opc 방법을 이용한 마스크 제조방법
CN109634070B (zh) * 2019-02-01 2020-09-01 墨研计算科学(南京)有限公司 一种基于掩模版拐角圆化的计算光刻方法及装置
KR20220140578A (ko) * 2020-02-14 2022-10-18 시놉시스, 인크. 리소그래피 마스크들의 개발을 위한 레이아웃들의 골격 표현
TWI743807B (zh) * 2020-05-27 2021-10-21 力晶積成電子製造股份有限公司 用於光學鄰近修正的重定位方法
TWI776444B (zh) * 2020-07-23 2022-09-01 國立成功大學 使用卷積神經網路的虛擬量測方法及其電腦程式產品
KR102633398B1 (ko) * 2021-05-27 2024-02-06 에스케이키파운드리 주식회사 반도체 소자를 위한 딥 트렌치 마스크 레이아웃 설계 방법
CN115933330A (zh) * 2022-12-31 2023-04-07 全芯智造技术有限公司 热点检测方法、设备和介质

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61138104A (ja) * 1984-12-10 1986-06-25 Hitachi Ltd パタ−ン検査方法
JP3508306B2 (ja) 1995-07-17 2004-03-22 ソニー株式会社 マスクパターン補正方法とそれを用いたマスク、露光方法および半導体装置
US6214494B1 (en) * 1998-10-07 2001-04-10 International Business Machines Corporation Serif mask design methodology based on enhancing high spatial frequency contribution for improved printability
US6373975B1 (en) * 1999-01-25 2002-04-16 International Business Machines Corporation Error checking of simulated printed images with process window effects included
JP4057733B2 (ja) * 1999-02-22 2008-03-05 株式会社東芝 転写パターンのシミュレーション方法
US6261724B1 (en) * 1999-06-16 2001-07-17 International Business Machines Corporation Method of modifying a microchip layout data set to generate a predicted mask printed data set
TW525224B (en) * 2000-01-14 2003-03-21 United Microelectronics Corp Transfer method of mask pattern for micro-lithography process
US6280887B1 (en) * 2000-03-02 2001-08-28 International Business Machines Corporation Complementary and exchange mask design methodology for optical proximity correction in microlithography
US6329107B1 (en) * 2000-03-15 2001-12-11 International Business Machines Corporation Method of characterizing partial coherent light illumination and its application to serif mask design
US7302111B2 (en) * 2001-09-12 2007-11-27 Micronic Laser Systems A.B. Graphics engine for high precision lithography
JP2004163472A (ja) * 2002-11-08 2004-06-10 Sony Corp フォトマスクの設計方法、フォトマスク、及び半導体装置
US7283165B2 (en) * 2002-11-15 2007-10-16 Lockheed Martin Corporation Method and apparatus for image processing using weighted defective pixel replacement
US7003758B2 (en) * 2003-10-07 2006-02-21 Brion Technologies, Inc. System and method for lithography simulation
US7079223B2 (en) * 2004-02-20 2006-07-18 International Business Machines Corporation Fast model-based optical proximity correction
US7856606B2 (en) * 2004-03-31 2010-12-21 Asml Masktools B.V. Apparatus, method and program product for suppressing waviness of features to be printed using photolithographic systems
TWI327685B (en) * 2004-04-09 2010-07-21 Asml Masktools Bv Optical proximity correction using chamfers and rounding at corners
US7266800B2 (en) * 2004-06-04 2007-09-04 Invarium, Inc. Method and system for designing manufacturable patterns that account for the pattern- and position-dependent nature of patterning processes
US7500218B2 (en) * 2004-08-17 2009-03-03 Asml Netherlands B.V. Lithographic apparatus, method, and computer program product for generating a mask pattern and device manufacturing method using same
DE102005009805A1 (de) * 2005-03-03 2006-09-14 Infineon Technologies Ag Lithographiemaske und Verfahren zum Erzeugen einer Lithographiemaske
US7297453B2 (en) * 2005-04-13 2007-11-20 Kla-Tencor Technologies Corporation Systems and methods for mitigating variances on a patterned wafer using a prediction model
US7444615B2 (en) * 2005-05-31 2008-10-28 Invarium, Inc. Calibration on wafer sweet spots
US7747978B2 (en) * 2005-08-08 2010-06-29 Asml Netherlands B.V. System and method for creating a focus-exposure model of a lithography process
US7617477B2 (en) * 2005-09-09 2009-11-10 Brion Technologies, Inc. Method for selecting and optimizing exposure tool using an individual mask error model
US7600212B2 (en) * 2005-10-03 2009-10-06 Cadence Design Systems, Inc. Method of compensating photomask data for the effects of etch and lithography processes
US7458059B2 (en) * 2005-10-31 2008-11-25 Synopsys, Inc. Model of sensitivity of a simulated layout to a change in original layout, and use of model in proximity correction

Also Published As

Publication number Publication date
JP5306357B2 (ja) 2013-10-02
US20090089736A1 (en) 2009-04-02
US20100146476A1 (en) 2010-06-10
TWI456420B (zh) 2014-10-11
EP2198343B1 (de) 2011-04-27
US7853919B2 (en) 2010-12-14
CN101675385B (zh) 2012-09-05
JP2010541003A (ja) 2010-12-24
DE602007014269D1 (de) 2011-06-09
CN101675385A (zh) 2010-03-17
US7707539B2 (en) 2010-04-27
EP2198343A1 (de) 2010-06-23
WO2009041987A1 (en) 2009-04-02
TW200915121A (en) 2009-04-01

Similar Documents

Publication Publication Date Title
DE602007014269D1 (de) Verbesserung der prozessmodellgenauigkeit durch simulation von maskenecken-rundungseffekten
SG129366A1 (en) Method of selecting a grid model for correcting a process recipe for grid deformations in a lithographic apparatus and lithographic assembly using thesame
CN102650966B (zh) 一种面向复用的嵌入式软件测试方法及其测试系统
WO2006019919A3 (en) Computer-implemented methods for generating input for a simulation program for generating a simulated image of a reticle
WO2010030450A3 (en) Method and apparatus for merging eda coverage logs of coverage data
WO2007030704A3 (en) System and method for mask verification using an individual mask error model
SG113598A1 (en) Method of manufacturing reliability checking and verification for lithography process using a calibrated eigen decomposition model
ATE404893T1 (de) Verfahren, apparat und computerprogramm zur stochastischen simulation von paleokanälen oder geologischen paleostrukturen
WO2008124216A3 (en) Method and apparatus for planning air refueling for aircraft
SG113602A1 (en) Method of predicting and minimizing model opc deviation due to mix/match of exposure tools using a calibrated eigen decomposition model
Savage et al. IP Reuse in the System on a Chip Era
BRPI0717497A2 (pt) Procedimentos de controle funcional de uma central inercial de um veículo móvel
WO2007078913A3 (en) Cross-architecture execution optimization
US9223754B2 (en) Co-simulation procedures using full derivatives of output variables
CN108038255A (zh) 一种自动制作PCB板set拼板的方法
TW200509215A (en) Pattern dimension correction method and verification method using OPC, mask and semiconductor device fabricated by using the correction method, and system and program for executing the correction method
ATE387661T1 (de) Verfahren zur auswahl von plug-in-codemodulen in einer datenverarbeitungseinrichtung
NO20090120L (no) Datasettmigrator for simulatorer
CN101738874B (zh) 光刻胶显影模拟的方法
KR102334532B1 (ko) 단백질 상호 작용 네트워크에서 신호 전파 간섭을 통한 약력학적 약물 상호 작용 예측 장치 및 방법
CN104615540A (zh) 代码规范管理系统
CN106709217A (zh) 一种自动检测走线角度的方法
US20160085519A1 (en) Determination of signals for readback from fpga
WO2012104135A3 (de) Zuflussbestimmung in kanalnetzen
US9239893B2 (en) Method and process computer for computation of the state variables of a hybrid differential-algebraic process model

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties