ATE512503T1 - Verfahren und vorrichtung zur codierung und decodierung von daten - Google Patents

Verfahren und vorrichtung zur codierung und decodierung von daten

Info

Publication number
ATE512503T1
ATE512503T1 AT05737553T AT05737553T ATE512503T1 AT E512503 T1 ATE512503 T1 AT E512503T1 AT 05737553 T AT05737553 T AT 05737553T AT 05737553 T AT05737553 T AT 05737553T AT E512503 T1 ATE512503 T1 AT E512503T1
Authority
AT
Austria
Prior art keywords
sub
deterministic
coding
column
decoding data
Prior art date
Application number
AT05737553T
Other languages
English (en)
Inventor
Brian K Classon
Yufei W Blankenship
Vipul A Desai
Original Assignee
Motorola Mobility Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Mobility Inc filed Critical Motorola Mobility Inc
Application granted granted Critical
Publication of ATE512503T1 publication Critical patent/ATE512503T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing
    • H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
    • H03M13/6393—Rate compatible low-density parity check [LDPC] codes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/618—Shortening and extension of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/6306—Error control coding in combination with Automatic Repeat reQuest [ARQ] and diversity transmission, e.g. coding schemes for the multiple transmission of the same information or the transmission of incremental redundancy
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Mathematical Physics (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
AT05737553T 2004-05-06 2005-04-19 Verfahren und vorrichtung zur codierung und decodierung von daten ATE512503T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/839,995 US7171603B2 (en) 2004-05-06 2004-05-06 Method and apparatus for encoding and decoding data
PCT/US2005/013440 WO2005112271A2 (en) 2004-05-06 2005-04-19 Method and apparatus for encoding and decoding data

Publications (1)

Publication Number Publication Date
ATE512503T1 true ATE512503T1 (de) 2011-06-15

Family

ID=35240749

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05737553T ATE512503T1 (de) 2004-05-06 2005-04-19 Verfahren und vorrichtung zur codierung und decodierung von daten

Country Status (11)

Country Link
US (1) US7171603B2 (de)
EP (1) EP1745551B1 (de)
JP (1) JP4142719B2 (de)
KR (1) KR100861674B1 (de)
CN (1) CN101124729A (de)
AT (1) ATE512503T1 (de)
BR (1) BRPI0505682B1 (de)
CA (1) CA2531527C (de)
ES (1) ES2364558T3 (de)
IL (1) IL172449A (de)
WO (1) WO2005112271A2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7631246B2 (en) * 2006-01-09 2009-12-08 Broadcom Corporation LDPC (low density parity check) code size adjustment by shortening and puncturing
KR101119111B1 (ko) * 2006-05-04 2012-03-16 엘지전자 주식회사 Ｌｄｐｃ 부호를 이용한 데이터 재전송 방법
US7913149B2 (en) * 2006-12-20 2011-03-22 Lsi Corporation Low complexity LDPC encoding algorithm
US7966548B2 (en) * 2007-06-29 2011-06-21 Alcatel-Lucent Usa Inc. Method and system for encoding data using rate-compatible irregular LDPC codes based on edge growth and parity splitting
US8261152B2 (en) * 2007-09-10 2012-09-04 Samsung Electronics Co., Ltd. Apparatus and method for channel encoding/decoding in communication system using variable-length LDPC codes
US9397699B2 (en) * 2009-07-21 2016-07-19 Ramot At Tel Aviv University Ltd. Compact decoding of punctured codes
US8516351B2 (en) * 2009-07-21 2013-08-20 Ramot At Tel Aviv University Ltd. Compact decoding of punctured block codes
US8516352B2 (en) * 2009-07-21 2013-08-20 Ramot At Tel Aviv University Ltd. Compact decoding of punctured block codes
US8375278B2 (en) * 2009-07-21 2013-02-12 Ramot At Tel Aviv University Ltd. Compact decoding of punctured block codes
KR101391859B1 (ko) * 2012-07-31 2014-05-07 최수정 저밀도 역 코드를 이용한 부호화/복호화 방법 및 장치
KR101391853B1 (ko) * 2012-07-31 2014-05-07 최수정 저밀도 역 코드를 이용한 부호화/복호화 방법 및 장치
US10176040B2 (en) 2016-04-05 2019-01-08 Micron Technology, Inc. Error correction code (ECC) operations in memory
TWI580197B (zh) * 2016-04-27 2017-04-21 國立清華大學 低密度奇偶檢查碼之編解碼方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0916422A (ja) * 1995-06-28 1997-01-17 Fanuc Ltd 誤り検出・訂正方法
WO2001097387A1 (en) * 2000-06-16 2001-12-20 Aware, Inc. Systems and methods for ldpc coded modulation
US6859503B2 (en) * 2001-04-07 2005-02-22 Motorola, Inc. Method and system in a transceiver for controlling a multiple-input, multiple-output communications channel
JP3481233B1 (ja) * 2002-05-27 2003-12-22 沖電気工業株式会社 キャパシタ構造の製造方法及びキャパシタ素子の製造方法
KR100891782B1 (ko) * 2002-06-11 2009-04-07 삼성전자주식회사 고속 데이터 전송 시스템에서 순방향 오류 정정 장치 및방법
KR100543154B1 (ko) 2002-07-26 2006-01-20 휴우즈 일렉트로닉스 코오포레이션 저밀도 패리티 검사 코드 생성 방법 및 시스템
US6785863B2 (en) * 2002-09-18 2004-08-31 Motorola, Inc. Method and apparatus for generating parity-check bits from a symbol set
US7702986B2 (en) * 2002-11-18 2010-04-20 Qualcomm Incorporated Rate-compatible LDPC codes
KR100809619B1 (ko) * 2003-08-26 2008-03-05 삼성전자주식회사 이동 통신 시스템에서 블록 저밀도 패러티 검사 부호부호화/복호 장치 및 방법
JP4534128B2 (ja) * 2004-03-05 2010-09-01 ソニー株式会社 符号化方法および装置
US7260763B2 (en) * 2004-03-11 2007-08-21 Nortel Networks Limited Algebraic low-density parity check code design for variable block sizes and code rates
AU2005239263B2 (en) * 2004-04-28 2008-12-04 Samsung Electronics Co., Ltd. Apparatus and method for coding/decoding block low density parity check code with variable block length
KR200369557Y1 (ko) * 2004-09-22 2004-12-08 신수호 보건교육용 건강달력

Also Published As

Publication number Publication date
KR100861674B1 (ko) 2008-10-07
CN101124729A (zh) 2008-02-13
ES2364558T3 (es) 2011-09-06
EP1745551B1 (de) 2011-06-08
EP1745551A2 (de) 2007-01-24
WO2005112271A3 (en) 2006-12-21
KR20060056933A (ko) 2006-05-25
IL172449A0 (en) 2006-04-10
WO2005112271A2 (en) 2005-11-24
JP4142719B2 (ja) 2008-09-03
EP1745551A4 (de) 2008-02-27
BRPI0505682A (pt) 2006-10-24
JP2007511139A (ja) 2007-04-26
WO2005112271B1 (en) 2007-02-22
CA2531527C (en) 2009-01-06
CA2531527A1 (en) 2005-11-24
US20050251730A1 (en) 2005-11-10
BRPI0505682B1 (pt) 2018-01-23
IL172449A (en) 2013-09-30
US7171603B2 (en) 2007-01-30

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