ATE515773T1 - Nichtflüchtiger speicher und verfahren mit sourceleitungsfehlerkompensation - Google Patents

Nichtflüchtiger speicher und verfahren mit sourceleitungsfehlerkompensation

Info

Publication number
ATE515773T1
ATE515773T1 AT06748943T AT06748943T ATE515773T1 AT E515773 T1 ATE515773 T1 AT E515773T1 AT 06748943 T AT06748943 T AT 06748943T AT 06748943 T AT06748943 T AT 06748943T AT E515773 T1 ATE515773 T1 AT E515773T1
Authority
AT
Austria
Prior art keywords
source line
page
reference point
volatile memory
source
Prior art date
Application number
AT06748943T
Other languages
English (en)
Inventor
Raul-Adrian Cernea
Siu Lung Chan
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sandisk Corp filed Critical Sandisk Corp
Application granted granted Critical
Publication of ATE515773T1 publication Critical patent/ATE515773T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Landscapes

  • Read Only Memory (AREA)
AT06748943T 2005-04-01 2006-03-29 Nichtflüchtiger speicher und verfahren mit sourceleitungsfehlerkompensation ATE515773T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/097,038 US7173854B2 (en) 2005-04-01 2005-04-01 Non-volatile memory and method with compensation for source line bias errors
PCT/US2006/011675 WO2006107706A1 (en) 2005-04-01 2006-03-29 Non-volatile memory and method with compensation for source line bias errors

Publications (1)

Publication Number Publication Date
ATE515773T1 true ATE515773T1 (de) 2011-07-15

Family

ID=36644892

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06748943T ATE515773T1 (de) 2005-04-01 2006-03-29 Nichtflüchtiger speicher und verfahren mit sourceleitungsfehlerkompensation

Country Status (8)

Country Link
US (2) US7173854B2 (de)
EP (1) EP1866932B1 (de)
JP (1) JP2008535140A (de)
KR (1) KR20080009073A (de)
CN (1) CN101176164A (de)
AT (1) ATE515773T1 (de)
TW (1) TW200707442A (de)
WO (1) WO2006107706A1 (de)

Families Citing this family (54)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100884235B1 (ko) * 2003-12-31 2009-02-17 삼성전자주식회사 불휘발성 메모리 카드
US7170784B2 (en) * 2005-04-01 2007-01-30 Sandisk Corporation Non-volatile memory and method with control gate compensation for source line bias errors
US7733704B2 (en) * 2005-12-29 2010-06-08 Sandisk Corporation Non-volatile memory with power-saving multi-pass sensing
US7224614B1 (en) * 2005-12-29 2007-05-29 Sandisk Corporation Methods for improved program-verify operations in non-volatile memories
US7447094B2 (en) * 2005-12-29 2008-11-04 Sandisk Corporation Method for power-saving multi-pass sensing in non-volatile memory
US7310255B2 (en) * 2005-12-29 2007-12-18 Sandisk Corporation Non-volatile memory with improved program-verify operations
US20070253255A1 (en) * 2006-04-28 2007-11-01 Girolamo Gallo Memory device, method for sensing a current output from a selected memory cell and sensing circuit
JP2010522951A (ja) * 2007-03-29 2010-07-08 サンディスク コーポレイション 不揮発性メモリおよびワード線沿いの電圧降下を補償する方法
US7508713B2 (en) 2007-03-29 2009-03-24 Sandisk Corporation Method of compensating variations along a word line in a non-volatile memory
US7577031B2 (en) * 2007-03-29 2009-08-18 Sandisk Corporation Non-volatile memory with compensation for variations along a word line
US7606076B2 (en) * 2007-04-05 2009-10-20 Sandisk Corporation Sensing in non-volatile storage using pulldown to regulated source voltage to remove system noise
US7606072B2 (en) * 2007-04-24 2009-10-20 Sandisk Corporation Non-volatile storage with compensation for source voltage drop
US7606071B2 (en) * 2007-04-24 2009-10-20 Sandisk Corporation Compensating source voltage drop in non-volatile storage
JP4504397B2 (ja) 2007-05-29 2010-07-14 株式会社東芝 半導体記憶装置
US7489553B2 (en) * 2007-06-07 2009-02-10 Sandisk Corporation Non-volatile memory with improved sensing having bit-line lockout control
WO2008154229A1 (en) * 2007-06-07 2008-12-18 Sandisk Corporation Non-volatile memory and method for improved sensing having bit-line lockout control
US7492640B2 (en) * 2007-06-07 2009-02-17 Sandisk Corporation Sensing with bit-line lockout control in non-volatile memory
KR100923834B1 (ko) * 2007-06-28 2009-10-27 주식회사 하이닉스반도체 불휘발성 메모리 장치
US7701761B2 (en) * 2007-12-20 2010-04-20 Sandisk Corporation Read, verify word line reference voltage to track source level
US7764547B2 (en) 2007-12-20 2010-07-27 Sandisk Corporation Regulation of source potential to combat cell source IR drop
JP2009151886A (ja) * 2007-12-21 2009-07-09 Toshiba Corp 半導体記憶装置
JP5127439B2 (ja) * 2007-12-28 2013-01-23 株式会社東芝 半導体記憶装置
US7593265B2 (en) * 2007-12-28 2009-09-22 Sandisk Corporation Low noise sense amplifier array and method for nonvolatile memory
JP4635066B2 (ja) 2008-03-19 2011-02-16 株式会社東芝 半導体記憶装置
US7957197B2 (en) * 2008-05-28 2011-06-07 Sandisk Corporation Nonvolatile memory with a current sense amplifier having a precharge circuit and a transfer gate coupled to a sense node
US7751249B2 (en) * 2008-06-27 2010-07-06 Sandisk Corporation Minimizing power noise during sensing in memory device
US7751250B2 (en) * 2008-06-27 2010-07-06 Sandisk Corporation Memory device with power noise minimization during sensing
JP5193701B2 (ja) * 2008-06-30 2013-05-08 株式会社東芝 半導体記憶装置
KR101427896B1 (ko) 2008-08-06 2014-08-11 삼성전자주식회사 공통 소스 라인의 노이즈를 줄이는 플래시 메모리 장치 및그것을 포함하는 메모리 시스템
KR101053700B1 (ko) * 2009-05-11 2011-08-02 주식회사 하이닉스반도체 전압 생성 회로 및 이를 구비한 불휘발성 메모리 소자
CN101923900B (zh) * 2009-06-09 2014-06-11 北京兆易创新科技股份有限公司 一种非易失存储器的擦除方法及装置
CN101673327B (zh) * 2009-06-12 2013-03-27 上海宏力半导体制造有限公司 电子装置
JP2012133840A (ja) * 2010-12-20 2012-07-12 Samsung Yokohama Research Institute Co Ltd 半導体記憶装置、及び記憶方法
US8358542B2 (en) * 2011-01-14 2013-01-22 Micron Technology, Inc. Methods, devices, and systems for adjusting sensing voltages in devices
US8705293B2 (en) 2011-10-20 2014-04-22 Sandisk Technologies Inc. Compact sense amplifier for non-volatile memory suitable for quick pass write
US8630120B2 (en) 2011-10-20 2014-01-14 Sandisk Technologies Inc. Compact sense amplifier for non-volatile memory
WO2013058960A2 (en) 2011-10-20 2013-04-25 Sandisk Technologies Inc. Compact sense amplifier for non-volatile memory
US9293195B2 (en) 2012-06-28 2016-03-22 Sandisk Technologies Inc. Compact high speed sense amplifier for non-volatile memory
US8971141B2 (en) 2012-06-28 2015-03-03 Sandisk Technologies Inc. Compact high speed sense amplifier for non-volatile memory and hybrid lockout
US20140003176A1 (en) 2012-06-28 2014-01-02 Man Lung Mui Compact High Speed Sense Amplifier for Non-Volatile Memory with Reduced layout Area and Power Consumption
KR102022355B1 (ko) 2012-07-10 2019-09-18 삼성전자주식회사 파워 게이팅 회로
US9177663B2 (en) 2013-07-18 2015-11-03 Sandisk Technologies Inc. Dynamic regulation of memory array source line
US9368224B2 (en) 2014-02-07 2016-06-14 SanDisk Technologies, Inc. Self-adjusting regulation current for memory array source line
US9208895B1 (en) 2014-08-14 2015-12-08 Sandisk Technologies Inc. Cell current control through power supply
US9349468B2 (en) 2014-08-25 2016-05-24 SanDisk Technologies, Inc. Operational amplifier methods for charging of sense amplifier internal nodes
US10395752B2 (en) * 2017-10-11 2019-08-27 Globalfoundries Inc. Margin test for multiple-time programmable memory (MTPM) with split wordlines
US10345841B1 (en) * 2018-06-12 2019-07-09 Nxp Usa, Inc. Current source with variable resistor circuit
US11004518B2 (en) 2019-06-28 2021-05-11 Sandisk Technologies Llc Threshold voltage setting with boosting read scheme
TWI702610B (zh) * 2019-09-24 2020-08-21 旺宏電子股份有限公司 資料感測裝置及其資料感測方法
US10971213B1 (en) 2019-09-24 2021-04-06 Macronix International Co., Ltd. Data sensing device and data sensing method thereof
US10984872B1 (en) * 2019-12-05 2021-04-20 Integrated Silicon Solution, (Cayman) Inc. Non-volatile memory with source line resistance compensation
US11875852B2 (en) * 2020-07-06 2024-01-16 Silicon Storage Technology, Inc. Adaptive bias decoder to provide a voltage to a control gate line in an analog neural memory array in artificial neural network
CN115774464A (zh) * 2021-09-08 2023-03-10 上海江波龙微电子技术有限公司 偏置电压提供电路、偏置电压提供方法及非易失存储芯片
CN115775572A (zh) * 2021-09-08 2023-03-10 上海江波龙微电子技术有限公司 偏置电压提供电路、偏置电压提供方法及非易失存储芯片

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1224062B (it) * 1979-09-28 1990-09-26 Ates Componenti Elettron Metodo di programmazione per una memoria a semiconduttore non volatile elettricamente alterabile
US5095344A (en) * 1988-06-08 1992-03-10 Eliyahou Harari Highly compact eprom and flash eeprom devices
US5070032A (en) * 1989-03-15 1991-12-03 Sundisk Corporation Method of making dense flash eeprom semiconductor memory structures
EP0617363B1 (de) * 1989-04-13 2000-01-26 SanDisk Corporation Austausch von fehlerhaften Speicherzellen einer EEprommatritze
US5172338B1 (en) * 1989-04-13 1997-07-08 Sandisk Corp Multi-state eeprom read and write circuits and techniques
US5343063A (en) * 1990-12-18 1994-08-30 Sundisk Corporation Dense vertical programmable read only memory cell structure and processes for making them
JP3210355B2 (ja) * 1991-03-04 2001-09-17 株式会社東芝 不揮発性半導体記憶装置
US5313421A (en) * 1992-01-14 1994-05-17 Sundisk Corporation EEPROM with split gate source side injection
US6222762B1 (en) * 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
US5315541A (en) * 1992-07-24 1994-05-24 Sundisk Corporation Segmented column memory array
US5555204A (en) * 1993-06-29 1996-09-10 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device
KR0169267B1 (ko) * 1993-09-21 1999-02-01 사토 후미오 불휘발성 반도체 기억장치
US5661053A (en) * 1994-05-25 1997-08-26 Sandisk Corporation Method of making dense flash EEPROM cell array and peripheral supporting circuits formed in deposited field oxide with the use of spacers
JP3359209B2 (ja) * 1995-11-29 2002-12-24 シャープ株式会社 半導体記憶装置及びメモリアクセス方法
US5903495A (en) * 1996-03-18 1999-05-11 Kabushiki Kaisha Toshiba Semiconductor device and memory system
US5768192A (en) * 1996-07-23 1998-06-16 Saifun Semiconductors, Ltd. Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping
US6768165B1 (en) * 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
JP3486079B2 (ja) * 1997-09-18 2004-01-13 株式会社東芝 半導体記憶装置
US6373753B1 (en) * 1999-02-13 2002-04-16 Robert J. Proebsting Memory array having selected word lines driven to an internally-generated boosted voltage that is substantially independent of VDD
US6055190A (en) * 1999-03-15 2000-04-25 Macronix International Co., Ltd. Device and method for suppressing bit line column leakage during erase verification of a memory cell
US6118702A (en) * 1999-10-19 2000-09-12 Advanced Micro Devices, Inc. Source bias compensation for page mode read operation in a flash memory device
US7196931B2 (en) 2002-09-24 2007-03-27 Sandisk Corporation Non-volatile memory and method with reduced source line bias errors
US6987693B2 (en) * 2002-09-24 2006-01-17 Sandisk Corporation Non-volatile memory and method with reduced neighboring field errors
US7443757B2 (en) 2002-09-24 2008-10-28 Sandisk Corporation Non-volatile memory and method with reduced bit line crosstalk errors
US7046568B2 (en) * 2002-09-24 2006-05-16 Sandisk Corporation Memory sensing circuit and method for low voltage operation
US7170784B2 (en) 2005-04-01 2007-01-30 Sandisk Corporation Non-volatile memory and method with control gate compensation for source line bias errors

Also Published As

Publication number Publication date
JP2008535140A (ja) 2008-08-28
US7173854B2 (en) 2007-02-06
TW200707442A (en) 2007-02-16
US20070115721A1 (en) 2007-05-24
US20060221693A1 (en) 2006-10-05
CN101176164A (zh) 2008-05-07
WO2006107706A1 (en) 2006-10-12
EP1866932B1 (de) 2011-07-06
EP1866932A1 (de) 2007-12-19
KR20080009073A (ko) 2008-01-24
US7391645B2 (en) 2008-06-24

Similar Documents

Publication Publication Date Title
ATE515773T1 (de) Nichtflüchtiger speicher und verfahren mit sourceleitungsfehlerkompensation
TW200707444A (en) Non-volatile memory and method with control gate compensation for source line bias errors
TWI478167B (zh) 在記憶體裝置及系統中判定及使用軟性資料
US7764547B2 (en) Regulation of source potential to combat cell source IR drop
DE602006008596D1 (de) Verwendung von datensperren bei der mehrphasigen programmierung nicht-flüchtiger speicher
US8274842B1 (en) Variable impedance memory device having simultaneous program and erase, and corresponding methods and circuits
TW200710678A (en) Apparatus and method for reading an array of nonvolatile memory cells including switchable resistor memory elements
TW200713276A (en) Apparatus and method for programming an array of nonvolatile memory cells including switchable resistor memory elements
WO2009146235A4 (en) Compensating non-volatile storage using different pass voltages during program- verify and read
US11270774B2 (en) Apparatus for calibrating sensing of memory cell data states
US20100008165A1 (en) Memory cell sensing using negative voltage
US20150228351A1 (en) Self-Adjusting Regulation Current for Memory Array Source Line
TW200620276A (en) Nonvolatile semiconductor memory device and read method
KR100865820B1 (ko) 메모리 소자 및 독출 방법
KR20120062818A (ko) 메모리 디바이스들에서 임계 전압 변화를 처리하는 방법들, 디바이스들, 및 시스템들
JP2012123885A (ja) 非揮発性メモリ装置
US9524787B2 (en) Semiconductor memory device
US20150023100A1 (en) Dynamic Regulation of Memory Array Source Line
US9361976B2 (en) Sense amplifier including a single-transistor amplifier and level shifter and methods therefor
KR101485727B1 (ko) 메모리로부터의 특정 데이터 양자화의 출력
KR20080035782A (ko) 플래시 메모리 장치 및 플래시 메모리 장치의 데이터 독출방법
US7088626B2 (en) Bias voltage applying circuit and semiconductor memory device
WO2012121872A2 (en) Sense operation in a stacked memory array device
US9224466B1 (en) Dual capacitor sense amplifier and methods therefor
US10923200B2 (en) Apparatus and methods for determining read voltages for a read operation

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties