ATE516584T1 - Durch bitline geregelter ansatz zur programmsteuerung von nichtflüchtigem speicher - Google Patents

Durch bitline geregelter ansatz zur programmsteuerung von nichtflüchtigem speicher

Info

Publication number
ATE516584T1
ATE516584T1 AT05737998T AT05737998T ATE516584T1 AT E516584 T1 ATE516584 T1 AT E516584T1 AT 05737998 T AT05737998 T AT 05737998T AT 05737998 T AT05737998 T AT 05737998T AT E516584 T1 ATE516584 T1 AT E516584T1
Authority
AT
Austria
Prior art keywords
applying
phase
bit lines
volatile memory
nand strings
Prior art date
Application number
AT05737998T
Other languages
English (en)
Inventor
Daniel Guterman
Nima Mokhlesi
Yupin Fong
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/839,764 external-priority patent/US7023733B2/en
Priority claimed from US10/839,806 external-priority patent/US7020026B2/en
Application filed by Sandisk Corp filed Critical Sandisk Corp
Application granted granted Critical
Publication of ATE516584T1 publication Critical patent/ATE516584T1/de

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/12Programming voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/24Bit-line control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3454Arrangements for verifying correct programming or for detecting overprogrammed cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
AT05737998T 2004-05-05 2005-04-20 Durch bitline geregelter ansatz zur programmsteuerung von nichtflüchtigem speicher ATE516584T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/839,764 US7023733B2 (en) 2004-05-05 2004-05-05 Boosting to control programming of non-volatile memory
US10/839,806 US7020026B2 (en) 2004-05-05 2004-05-05 Bitline governed approach for program control of non-volatile memory
PCT/US2005/013366 WO2005112036A1 (en) 2004-05-05 2005-04-20 Bitune governed approach for program control of non-volatile memory

Publications (1)

Publication Number Publication Date
ATE516584T1 true ATE516584T1 (de) 2011-07-15

Family

ID=34966408

Family Applications (2)

Application Number Title Priority Date Filing Date
AT05737998T ATE516584T1 (de) 2004-05-05 2005-04-20 Durch bitline geregelter ansatz zur programmsteuerung von nichtflüchtigem speicher
AT05736981T ATE511187T1 (de) 2004-05-05 2005-04-20 Boosting zur steuerung der programmierung von nichtflüchtigem speicher

Family Applications After (1)

Application Number Title Priority Date Filing Date
AT05736981T ATE511187T1 (de) 2004-05-05 2005-04-20 Boosting zur steuerung der programmierung von nichtflüchtigem speicher

Country Status (6)

Country Link
EP (2) EP1751771B1 (de)
JP (2) JP4763687B2 (de)
KR (1) KR100806327B1 (de)
AT (2) ATE516584T1 (de)
TW (2) TWI305361B (de)
WO (2) WO2005112036A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7130210B2 (en) * 2005-01-13 2006-10-31 Spansion Llc Multi-level ONO flash program algorithm for threshold width control
US7626866B2 (en) * 2006-07-28 2009-12-01 Micron Technology, Inc. NAND flash memory programming
US7511996B2 (en) * 2006-11-30 2009-03-31 Mosaid Technologies Incorporated Flash memory program inhibit scheme
JP4640658B2 (ja) * 2008-02-15 2011-03-02 マイクロン テクノロジー, インク. マルチレベル抑制スキーム
US8081514B2 (en) * 2009-08-25 2011-12-20 Sandisk Technologies Inc. Partial speed and full speed programming for non-volatile memory using floating bit lines
JP4922464B1 (ja) * 2011-05-02 2012-04-25 株式会社東芝 半導体記憶装置
TWI675273B (zh) * 2019-03-28 2019-10-21 友達光電股份有限公司 升壓電路、輸出緩衝電路與顯示面板
CN110892482B (zh) 2019-10-12 2021-01-29 长江存储科技有限责任公司 对存储器件进行编程的方法及相关存储器件
US11521691B1 (en) * 2021-06-02 2022-12-06 Sandisk Technologies Llc Triggering next state verify in program loop for nonvolatile memory

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1224062B (it) 1979-09-28 1990-09-26 Ates Componenti Elettron Metodo di programmazione per una memoria a semiconduttore non volatile elettricamente alterabile
US5313421A (en) 1992-01-14 1994-05-17 Sundisk Corporation EEPROM with split gate source side injection
KR0169267B1 (ko) 1993-09-21 1999-02-01 사토 후미오 불휘발성 반도체 기억장치
KR100253868B1 (ko) * 1995-11-13 2000-05-01 니시무로 타이죠 불휘발성 반도체기억장치
JP3504057B2 (ja) * 1996-03-18 2004-03-08 株式会社東芝 不揮発性半導体記憶装置
KR100244864B1 (ko) * 1996-03-18 2000-03-02 니시무로 타이죠 불휘발성 반도체 기억 장치
US5712815A (en) 1996-04-22 1998-01-27 Advanced Micro Devices, Inc. Multiple bits per-cell flash EEPROM capable of concurrently programming and verifying memory cells and reference cells
JP3481817B2 (ja) * 1997-04-07 2003-12-22 株式会社東芝 半導体記憶装置
JP4157189B2 (ja) * 1997-05-14 2008-09-24 株式会社東芝 不揮発性半導体記憶装置
JP3906545B2 (ja) * 1998-02-03 2007-04-18 ソニー株式会社 不揮発性半導体記憶装置
JP3999900B2 (ja) * 1998-09-10 2007-10-31 株式会社東芝 不揮発性半導体メモリ
JP2000149577A (ja) * 1998-11-10 2000-05-30 Sony Corp 不揮発性半導体記憶装置およびそのデータ書き込み方法
JP4154771B2 (ja) * 1998-11-10 2008-09-24 ソニー株式会社 不揮発性半導体記憶装置およびそのデータ書き込み方法
JP2001067884A (ja) * 1999-08-31 2001-03-16 Hitachi Ltd 不揮発性半導体記憶装置
US6301161B1 (en) * 2000-04-25 2001-10-09 Winbond Electronics Corporation Programming flash memory analog storage using coarse-and-fine sequence
JP3810985B2 (ja) * 2000-05-22 2006-08-16 株式会社東芝 不揮発性半導体メモリ
JP3631463B2 (ja) * 2001-12-27 2005-03-23 株式会社東芝 不揮発性半導体記憶装置
KR100453854B1 (ko) * 2001-09-07 2004-10-20 삼성전자주식회사 향상된 프로그램 방지 특성을 갖는 불휘발성 반도체메모리 장치 및 그것의 프로그램 방법

Also Published As

Publication number Publication date
TW200625333A (en) 2006-07-16
JP4763687B2 (ja) 2011-08-31
JP2007536682A (ja) 2007-12-13
KR20070067011A (ko) 2007-06-27
TWI279808B (en) 2007-04-21
EP1751771A1 (de) 2007-02-14
WO2005112037A1 (en) 2005-11-24
JP2007536681A (ja) 2007-12-13
TW200620300A (en) 2006-06-16
EP1751770B1 (de) 2011-05-25
JP4879168B2 (ja) 2012-02-22
EP1751771B1 (de) 2011-07-13
EP1751770A1 (de) 2007-02-14
KR100806327B1 (ko) 2008-02-27
ATE511187T1 (de) 2011-06-15
WO2005112036A1 (en) 2005-11-24
TWI305361B (en) 2009-01-11

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