ATE519163T1 - Verfahren und vorrichtung zur interrupt- verteilung in einem multiprozessorsystem - Google Patents

Verfahren und vorrichtung zur interrupt- verteilung in einem multiprozessorsystem

Info

Publication number
ATE519163T1
ATE519163T1 AT07700036T AT07700036T ATE519163T1 AT E519163 T1 ATE519163 T1 AT E519163T1 AT 07700036 T AT07700036 T AT 07700036T AT 07700036 T AT07700036 T AT 07700036T AT E519163 T1 ATE519163 T1 AT E519163T1
Authority
AT
Austria
Prior art keywords
completion time
interrupt request
estimating
transaction
processor
Prior art date
Application number
AT07700036T
Other languages
English (en)
Inventor
Milind Manohar Kulkarni
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE519163T1 publication Critical patent/ATE519163T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/50—Indexing scheme relating to G06F9/50
    • G06F2209/5019—Workload prediction

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
AT07700036T 2006-01-04 2007-01-04 Verfahren und vorrichtung zur interrupt- verteilung in einem multiprozessorsystem ATE519163T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US75642406P 2006-01-04 2006-01-04
PCT/IB2007/050014 WO2007077539A1 (en) 2006-01-04 2007-01-04 Methods and system for interrupt distribution in a multiprocessor system

Publications (1)

Publication Number Publication Date
ATE519163T1 true ATE519163T1 (de) 2011-08-15

Family

ID=37909715

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07700036T ATE519163T1 (de) 2006-01-04 2007-01-04 Verfahren und vorrichtung zur interrupt- verteilung in einem multiprozessorsystem

Country Status (6)

Country Link
US (1) US7899966B2 (de)
EP (1) EP1971924B1 (de)
JP (1) JP2009534719A (de)
CN (1) CN101366012A (de)
AT (1) ATE519163T1 (de)
WO (1) WO2007077539A1 (de)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101896887A (zh) * 2007-12-12 2010-11-24 Nxp股份有限公司 数据处理系统和中断处理方法
JP5169731B2 (ja) * 2008-10-24 2013-03-27 富士通セミコンダクター株式会社 マルチプロセッサシステムｌｓｉ
US7996595B2 (en) * 2009-04-14 2011-08-09 Lstar Technologies Llc Interrupt arbitration for multiprocessors
US8321614B2 (en) * 2009-04-24 2012-11-27 Empire Technology Development Llc Dynamic scheduling interrupt controller for multiprocessors
US8260996B2 (en) * 2009-04-24 2012-09-04 Empire Technology Development Llc Interrupt optimization for multiprocessors
US8234431B2 (en) * 2009-10-13 2012-07-31 Empire Technology Development Llc Interrupt masking for multi-core processors
US8312195B2 (en) * 2010-02-18 2012-11-13 Red Hat, Inc. Managing interrupts using a preferred binding between a device generating interrupts and a CPU
US8832709B2 (en) * 2010-07-19 2014-09-09 Flash Networks Ltd. Network optimization
KR101717494B1 (ko) * 2010-10-08 2017-03-28 삼성전자주식회사 인터럽트 처리 장치 및 방법
US8688074B2 (en) 2011-02-28 2014-04-01 Moisixell Networks Ltd. Service classification of web traffic
US9411624B2 (en) * 2011-11-22 2016-08-09 Red Hat Israel, Ltd. Virtual device interrupt hinting in a virtualization system
US9043522B2 (en) 2012-10-17 2015-05-26 Arm Limited Handling interrupts in a multi-processor system
US9208113B2 (en) 2013-01-15 2015-12-08 Apple Inc. Deferred inter-processor interrupts
JP6233032B2 (ja) * 2013-06-05 2017-11-22 デクセリアルズ株式会社 光学活性化合物の製造方法
US9524195B2 (en) 2014-02-27 2016-12-20 International Business Machines Corporation Adaptive process for data sharing with selection of lock elision and locking
US9996145B2 (en) * 2013-11-18 2018-06-12 Nxp B.V. Shared interrupt multi-core architecture for low power applications
US9575890B2 (en) 2014-02-27 2017-02-21 International Business Machines Corporation Supporting atomic accumulation with an addressable accumulator
US9442775B2 (en) 2014-02-27 2016-09-13 International Business Machines Corporation Salvaging hardware transactions with instructions to transfer transaction execution control
US9471371B2 (en) 2014-02-27 2016-10-18 International Business Machines Corporation Dynamic prediction of concurrent hardware transactions resource requirements and allocation
US9430273B2 (en) 2014-02-27 2016-08-30 International Business Machines Corporation Suppressing aborting a transaction beyond a threshold execution duration based on the predicted duration
US20150242344A1 (en) * 2014-02-27 2015-08-27 International Business Machines Corporation Delaying floating interruption while in tx mode
US9442853B2 (en) 2014-02-27 2016-09-13 International Business Machines Corporation Salvaging lock elision transactions with instructions to change execution type
US9361041B2 (en) 2014-02-27 2016-06-07 International Business Machines Corporation Hint instruction for managing transactional aborts in transactional memory computing environments
US20150242347A1 (en) * 2014-02-27 2015-08-27 International Business Machines Corporation Evading floating interruption while in the transactional-execution mode
US9465673B2 (en) 2014-02-27 2016-10-11 International Business Machines Corporation Deferral instruction for managing transactional aborts in transactional memory computing environments to complete transaction by deferring disruptive events handling
US9329946B2 (en) 2014-02-27 2016-05-03 International Business Machines Corporation Salvaging hardware transactions
US9262206B2 (en) 2014-02-27 2016-02-16 International Business Machines Corporation Using the transaction-begin instruction to manage transactional aborts in transactional memory computing environments
US9311178B2 (en) 2014-02-27 2016-04-12 International Business Machines Corporation Salvaging hardware transactions with instructions
US9336097B2 (en) 2014-02-27 2016-05-10 International Business Machines Corporation Salvaging hardware transactions
US9645879B2 (en) 2014-02-27 2017-05-09 International Business Machines Corporation Salvaging hardware transactions with instructions
US9411729B2 (en) 2014-02-27 2016-08-09 International Business Machines Corporation Salvaging lock elision transactions
US20150242216A1 (en) 2014-02-27 2015-08-27 International Business Machines Corporation Committing hardware transactions that are about to run out of resource
US9424072B2 (en) 2014-02-27 2016-08-23 International Business Machines Corporation Alerting hardware transactions that are about to run out of space
US9524187B2 (en) 2014-03-02 2016-12-20 International Business Machines Corporation Executing instruction with threshold indicating nearing of completion of transaction
JP6365224B2 (ja) * 2014-10-21 2018-08-01 富士通株式会社 センシング制御プログラム及び携帯端末装置
US10089265B2 (en) * 2015-08-07 2018-10-02 Mediatek Inc. Methods and systems for handling interrupt requests
US10467162B2 (en) 2017-03-31 2019-11-05 Hewlett Packard Enterprise Development Lp Interrupt based on a last interrupt request indicator and a work acknowledgement
US10423550B2 (en) * 2017-10-25 2019-09-24 International Business Machines Corporation Managing efficient selection of a particular processor thread for handling an interrupt
US10838760B2 (en) 2017-11-29 2020-11-17 Nxp Usa, Inc. Systems and methods for interrupt distribution
JP2020021186A (ja) * 2018-07-31 2020-02-06 富士通株式会社 トランザクション制御装置、トランザクション制御プログラムおよびトランザクション制御方法
CN113867918B (zh) * 2021-09-30 2025-03-25 北京紫光展锐通信技术有限公司 中断均衡方法、装置、电子设备和计算机可读存储介质

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3008896B2 (ja) * 1997-06-16 2000-02-14 日本電気株式会社 共有バス型マルチプロセッサシステムの割り込み負荷分散システム
US6606676B1 (en) * 1999-11-08 2003-08-12 International Business Machines Corporation Method and apparatus to distribute interrupts to multiple interrupt handlers in a distributed symmetric multiprocessor system
ATE492840T1 (de) * 2000-10-31 2011-01-15 Millennial Net Inc Vernetztes verarbeitungssystem mit optimiertem leistungswirkungsgrad
US6918117B2 (en) * 2001-02-08 2005-07-12 International Business Machines Corporation Apparatus and method for dynamic load balancing of multiple cryptographic devices
US20040103251A1 (en) * 2002-11-26 2004-05-27 Mitchell Alsup Microprocessor including a first level cache and a second level cache having different cache line sizes

Also Published As

Publication number Publication date
JP2009534719A (ja) 2009-09-24
WO2007077539A1 (en) 2007-07-12
US7899966B2 (en) 2011-03-01
EP1971924A1 (de) 2008-09-24
EP1971924B1 (de) 2011-08-03
CN101366012A (zh) 2009-02-11
US20090228625A1 (en) 2009-09-10

Similar Documents

Publication Publication Date Title
ATE519163T1 (de) Verfahren und vorrichtung zur interrupt- verteilung in einem multiprozessorsystem
IN2014KN02671A (de)
ATE355556T1 (de) Verfahren, vorrichtung und computerprogramm zum verarbeiten einer warteschlange von nachrichten
GB2470492A (en) A system and method to manage a workflow in delivering healthcare
DE60329096D1 (de) System, verfahren und vorrichtung zur datenverarbeitung und -speicherung zur bereitstellung kontinuierlicher operationen unabhängig von einrichtungsausfall oder katastrophen
EP1877926A4 (de) Vorrichtungen, verfahren und systeme zum identifizieren, erzeugen und aggregieren qualifizierter verkäufe und marketing-leads zur verteilung über ein online-system für konkurrierendes bieten
GB2434670B (en) Monitoring and management of distributed information systems
WO2012135472A3 (en) Systems and methods for assessing vehicle and vehicle operator efficiency
WO2007098251A3 (en) Customer selected coalition systems and methods
WO2009123848A3 (en) Apparatus and method for low overhead correlation of multi-processor trace information
WO2012040270A3 (en) Systems and methods to program operations for interaction with users
WO2007120941A3 (en) Compliance program assessment tool
ATE437499T1 (de) Verfahren und vorrichtung zum berechnen eines pfades in einer netzwerkdomäne
EP2251814A3 (de) Lizenzverwaltungssystem und Lizenzverwaltungsverfahren
ATE368256T1 (de) Verfahren und vorrichtung zur feststellung einer prozessorenbelastung
BRPI0703672A (pt) sistema e método para gerenciar interrupções de gerenciamento de sistema em um sistema de computador de multiprocessador
ATE266232T1 (de) Verfahren und vorrichtung zur automatischen wahrnehmung
TW200627286A (en) Method and system for scheduling partial ordered transactions for event correlation
FR2997774B1 (fr) Procede, dispositif et programme d'ordinateur de placement de taches dans un systeme multi-cœurs
EP2151714A3 (de) Programm und Verfahren zur Erzeugung von Maskendaten
SG157250A1 (en) Method for generating test data
GB2523694A (en) Methods, remote access systems, client computing devices, and server devices for use in remote access systems
JP2007193579A5 (de)
BR112014017283A2 (pt) máquina de instalação e formato de pacote para instalações paralelizáveis, confiáveis
ATE538436T1 (de) Verfahren zur zuführung von interrupts zu benutzermodustreibern

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties