ATE520075T1 - Verfahren zum vorladen von konfigurationen eines umkonfigurierbaren heterogenen systems zur informationsverarbeitung in eine speicherhierarchie - Google Patents

Verfahren zum vorladen von konfigurationen eines umkonfigurierbaren heterogenen systems zur informationsverarbeitung in eine speicherhierarchie

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Publication number
ATE520075T1
ATE520075T1 AT09708613T AT09708613T ATE520075T1 AT E520075 T1 ATE520075 T1 AT E520075T1 AT 09708613 T AT09708613 T AT 09708613T AT 09708613 T AT09708613 T AT 09708613T AT E520075 T1 ATE520075 T1 AT E520075T1
Authority
AT
Austria
Prior art keywords
preloading
tasks
execution
given task
executed
Prior art date
Application number
AT09708613T
Other languages
English (en)
Inventor
Stephane Guyetant
Stephane Chevobbe
Original Assignee
Commissariat Energie Atomique
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat Energie Atomique filed Critical Commissariat Energie Atomique
Application granted granted Critical
Publication of ATE520075T1 publication Critical patent/ATE520075T1/de

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Stored Programmes (AREA)
  • Advance Control (AREA)
  • Logic Circuits (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
AT09708613T 2008-02-08 2009-02-06 Verfahren zum vorladen von konfigurationen eines umkonfigurierbaren heterogenen systems zur informationsverarbeitung in eine speicherhierarchie ATE520075T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0800677A FR2927438B1 (fr) 2008-02-08 2008-02-08 Methode de prechargement dans une hierarchie de memoires des configurations d'un systeme heterogene reconfigurable de traitement de l'information
PCT/EP2009/051409 WO2009098311A1 (fr) 2008-02-08 2009-02-06 Methode de prechargement dans une hierarchie de memoires des configurations d'un systeme heterogene reconfigurable de traitement de l'information

Publications (1)

Publication Number Publication Date
ATE520075T1 true ATE520075T1 (de) 2011-08-15

Family

ID=40085456

Family Applications (1)

Application Number Title Priority Date Filing Date
AT09708613T ATE520075T1 (de) 2008-02-08 2009-02-06 Verfahren zum vorladen von konfigurationen eines umkonfigurierbaren heterogenen systems zur informationsverarbeitung in eine speicherhierarchie

Country Status (6)

Country Link
US (1) US8656102B2 (de)
EP (1) EP2257876B1 (de)
JP (1) JP2011511377A (de)
AT (1) ATE520075T1 (de)
FR (1) FR2927438B1 (de)
WO (1) WO2009098311A1 (de)

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CN119835486B (zh) * 2025-03-17 2025-05-16 深圳市玥芯通科技有限公司 网络高清播放机的快速启动及内容预加载方法及装置

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Also Published As

Publication number Publication date
WO2009098311A1 (fr) 2009-08-13
JP2011511377A (ja) 2011-04-07
US8656102B2 (en) 2014-02-18
EP2257876B1 (de) 2011-08-10
FR2927438B1 (fr) 2010-03-05
US20110055480A1 (en) 2011-03-03
FR2927438A1 (fr) 2009-08-14
EP2257876A1 (de) 2010-12-08

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