ATE521040T1 - Ein spezialspeichergerät - Google Patents

Ein spezialspeichergerät

Info

Publication number
ATE521040T1
ATE521040T1 AT02012940T AT02012940T ATE521040T1 AT E521040 T1 ATE521040 T1 AT E521040T1 AT 02012940 T AT02012940 T AT 02012940T AT 02012940 T AT02012940 T AT 02012940T AT E521040 T1 ATE521040 T1 AT E521040T1
Authority
AT
Austria
Prior art keywords
asspu
processing unit
storage device
special storage
memory chip
Prior art date
Application number
AT02012940T
Other languages
English (en)
Inventor
Alon Ironi
Shachaf Zak
Original Assignee
Zoran Microelectronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zoran Microelectronics Ltd filed Critical Zoran Microelectronics Ltd
Application granted granted Critical
Publication of ATE521040T1 publication Critical patent/ATE521040T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1647—Handling requests for interconnection or transfer for access to memory bus based on arbitration with interleaved bank access
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7821—Tightly coupled to memory, e.g. computational memory, smart memory, processor in memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Television Signal Processing For Recording (AREA)
  • Microcomputers (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Preparation Of Compounds By Using Micro-Organisms (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Telephone Function (AREA)
  • Memory System (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Dram (AREA)
AT02012940T 2001-06-11 2002-06-11 Ein spezialspeichergerät ATE521040T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US29673301P 2001-06-11 2001-06-11

Publications (1)

Publication Number Publication Date
ATE521040T1 true ATE521040T1 (de) 2011-09-15

Family

ID=23143319

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02012940T ATE521040T1 (de) 2001-06-11 2002-06-11 Ein spezialspeichergerät

Country Status (6)

Country Link
US (1) US7174415B2 (de)
EP (1) EP1267272B1 (de)
JP (1) JP2003177958A (de)
KR (1) KR100489719B1 (de)
AT (1) ATE521040T1 (de)
IL (1) IL150149A (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9015390B2 (en) * 2003-04-25 2015-04-21 Micron Technology, Inc. Active memory data compression system and method
US7486297B2 (en) * 2003-09-22 2009-02-03 Ati Technologies, Inc. Method and apparatus for image processing in a handheld device
CN100363910C (zh) * 2004-04-01 2008-01-23 光宝科技股份有限公司 快速释放控制权的打印机驱动方法
US7339837B2 (en) * 2004-05-18 2008-03-04 Infineon Technologies Ag Configurable embedded processor
US7353319B2 (en) * 2005-06-02 2008-04-01 Qualcomm Incorporated Method and apparatus for segregating shared and non-shared data in cache memory banks
US10754793B2 (en) 2018-02-28 2020-08-25 Micron Technology, Inc. Memory module data object processing systems and methods
KR102665410B1 (ko) 2018-07-30 2024-05-13 삼성전자주식회사 메모리 장치의 내부 프로세싱 동작 방법
WO2022047403A1 (en) * 2020-08-31 2022-03-03 Zidan Mohammed Memory processing unit architectures and configurations

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69132495T2 (de) 1990-03-16 2001-06-13 Texas Instruments Inc., Dallas Verteilter Verarbeitungsspeicher
JPH04248642A (ja) 1991-01-18 1992-09-04 Kenneth W Iobst メモリ集積回路のｐｉｍチップおよびその制御方法
EP0525308A1 (de) * 1991-07-31 1993-02-03 International Business Machines Corporation Speicherabbildung für einen Prozessor-Cache-Speicher
JPH05342140A (ja) 1992-06-12 1993-12-24 Fuji Xerox Co Ltd データ処理装置
EP0584783A3 (en) 1992-08-25 1994-06-22 Texas Instruments Inc Method and apparatus for improved processing
US6000027A (en) 1992-08-25 1999-12-07 Texas Instruments Incorporated Method and apparatus for improved graphics/image processing using a processor and a memory
JPH08221313A (ja) 1995-02-14 1996-08-30 Hitachi Ltd 半導体装置
US5870625A (en) * 1995-12-11 1999-02-09 Industrial Technology Research Institute Non-blocking memory write/read mechanism by combining two pending commands write and read in buffer and executing the combined command in advance of other pending command
US5854638A (en) 1996-02-02 1998-12-29 Opti Inc. Unified memory architecture with parallel access by host and video controller
US5815167A (en) * 1996-06-27 1998-09-29 Intel Corporation Method and apparatus for providing concurrent access by a plurality of agents to a shared memory
US6070002A (en) * 1996-09-13 2000-05-30 Silicon Graphics, Inc. System software for use in a graphics computer system having a shared system memory
KR19980022263A (ko) * 1996-09-20 1998-07-06 김광호 비디오 메모리를 시스템 메모리로 이용하는 방법
US6170048B1 (en) * 1997-03-24 2001-01-02 Texas Instruments Incorporated PC circuits, systems and methods
US6185704B1 (en) 1997-04-11 2001-02-06 Texas Instruments Incorporated System signaling schemes for processor and memory module
US5941968A (en) * 1997-04-14 1999-08-24 Advanced Micro Devices, Inc. Computer system for concurrent data transferring between graphic controller and unified system memory and between CPU and expansion bus device
US6026478A (en) 1997-08-01 2000-02-15 Micron Technology, Inc. Split embedded DRAM processor
JP3786521B2 (ja) 1998-07-01 2006-06-14 株式会社日立製作所 半導体集積回路及びデータ処理システム
US6330646B1 (en) * 1999-01-08 2001-12-11 Intel Corporation Arbitration mechanism for a computer system having a unified memory architecture

Also Published As

Publication number Publication date
JP2003177958A (ja) 2003-06-27
US20030012062A1 (en) 2003-01-16
KR100489719B1 (ko) 2005-05-16
EP1267272A3 (de) 2006-06-28
IL150149A (en) 2008-08-07
US7174415B2 (en) 2007-02-06
IL150149A0 (en) 2002-12-01
EP1267272B1 (de) 2011-08-17
KR20020095126A (ko) 2002-12-20
EP1267272A2 (de) 2002-12-18

Similar Documents

Publication Publication Date Title
FR2701120B1 (fr) Appareil de test de mémoire.
EP0635801A3 (de) Externe Speichervorrichtung.
DE60114359D1 (de) Datenspeicheranordnung
DE60137403D1 (de) Datenspeicheranordnung
EP0667620A3 (de) Halbleiterspeicheranordnung.
NO20032408D0 (no) Displayminne, driverkrets, display og portabel informasjonsinnretning
DE60136959D1 (de) Informationsverarbeitungseinrichtung
EP0627741A3 (de) Halbleiterspeicheranordnung.
EP0739015A3 (de) Halbleiterspeicheranordnung
DE69812814D1 (de) Vorrichtung zur Ausgabe von kontaktlosen Datenträgern
EP0614192A3 (de) Speicherelement.
BR9402676A (pt) Dispositivo integrado.
DE69432846D1 (de) Halbleiterspeichereinrichtung
EP0606769A3 (de) Nicht-flüchtige Halbleiterspeichern.
EP1434212A4 (de) Plattenlaufwerk
EP0683492A3 (de) Lese Speicherschaltung.
ATE521040T1 (de) Ein spezialspeichergerät
EP0667621A3 (de) Halbleiterspeicheranordnung.
DK1070321T3 (da) Fremgangsmåde til lagring af en identifikation på en informationsbærer, samt indretning og informationsbærer
FR2706672B1 (fr) Dispositif de mémoire à semiconducteurs.
DE60223894D1 (de) Halbleiterspeicheranordung und Informationgerät
FI20020808A7 (fi) Arkaluontoisten tietojen tallentaminen
DE60132829D1 (de) Halbleiterspeicheranordnung und Datenverarbeitungseinheit
EP1143453A4 (de) Halbleiter Speichereinrichtung
EP0622806A3 (de) Nichtflüchtige halbleiterspeicheranordnung.

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties