ATE525727T1 - Lesen benachbarter zellen mit marge für leseoperationen eines nichtflüchtigen speichers mit kopplungskompensation - Google Patents
Lesen benachbarter zellen mit marge für leseoperationen eines nichtflüchtigen speichers mit kopplungskompensationInfo
- Publication number
- ATE525727T1 ATE525727T1 AT07869948T AT07869948T ATE525727T1 AT E525727 T1 ATE525727 T1 AT E525727T1 AT 07869948 T AT07869948 T AT 07869948T AT 07869948 T AT07869948 T AT 07869948T AT E525727 T1 ATE525727 T1 AT E525727T1
- Authority
- AT
- Austria
- Prior art keywords
- adjacent
- memory cell
- reading
- volatile memory
- coupling
- Prior art date
Links
- 230000008878 coupling Effects 0.000 title abstract 3
- 238000010168 coupling process Methods 0.000 title abstract 3
- 238000005859 coupling reaction Methods 0.000 title abstract 3
- 230000001808 coupling effect Effects 0.000 abstract 1
- 230000005684 electric field Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
- G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/564—Miscellaneous aspects
- G11C2211/5646—Multilevel memory with flag bits, e.g. for showing that a "first page" of a word line is programmed but not a "second page"
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/618,624 US7606070B2 (en) | 2006-12-29 | 2006-12-29 | Systems for margined neighbor reading for non-volatile memory read operations including coupling compensation |
| US11/618,616 US7518923B2 (en) | 2006-12-29 | 2006-12-29 | Margined neighbor reading for non-volatile memory read operations including coupling compensation |
| PCT/US2007/088899 WO2008083196A2 (en) | 2006-12-29 | 2007-12-27 | Margined neighbor reading for non-volatile memory read operations including coupling compensation |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE525727T1 true ATE525727T1 (de) | 2011-10-15 |
Family
ID=39472436
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT07869948T ATE525727T1 (de) | 2006-12-29 | 2007-12-27 | Lesen benachbarter zellen mit marge für leseoperationen eines nichtflüchtigen speichers mit kopplungskompensation |
Country Status (7)
| Country | Link |
|---|---|
| EP (1) | EP2100307B1 (de) |
| JP (1) | JP5159790B2 (de) |
| KR (1) | KR101094422B1 (de) |
| CN (1) | CN101627442B (de) |
| AT (1) | ATE525727T1 (de) |
| TW (1) | TWI380311B (de) |
| WO (1) | WO2008083196A2 (de) |
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101291667B1 (ko) * | 2007-08-20 | 2013-08-01 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그 독출 방법 |
| KR101484556B1 (ko) | 2008-10-28 | 2015-01-20 | 삼성전자주식회사 | 독출 보상 회로 |
| JP2010134983A (ja) * | 2008-12-03 | 2010-06-17 | Toshiba Corp | デプレッションタイプnandフラッシュメモリ |
| US7813181B2 (en) * | 2008-12-31 | 2010-10-12 | Sandisk Corporation | Non-volatile memory and method for sensing with pipelined corrections for neighboring perturbations |
| CN103119656A (zh) | 2010-09-24 | 2013-05-22 | 株式会社东芝 | 非易失性半导体存储器件 |
| US8782495B2 (en) * | 2010-12-23 | 2014-07-15 | Sandisk Il Ltd | Non-volatile memory and methods with asymmetric soft read points around hard read points |
| US8099652B1 (en) * | 2010-12-23 | 2012-01-17 | Sandisk Corporation | Non-volatile memory and methods with reading soft bits in non uniform schemes |
| US8498152B2 (en) | 2010-12-23 | 2013-07-30 | Sandisk Il Ltd. | Non-volatile memory and methods with soft-bit reads while reading hard bits with compensation for coupling |
| KR101798013B1 (ko) | 2010-12-30 | 2017-11-16 | 삼성전자주식회사 | 비휘발성 메모리 장치의 프로그램 방법 |
| KR101772951B1 (ko) | 2011-03-10 | 2017-09-13 | 삼성전자주식회사 | 불 휘발성 메모리 장치 및 그것의 읽기 방법 |
| KR101913291B1 (ko) | 2011-09-09 | 2018-12-28 | 삼성전자주식회사 | 비휘발성 메모리 장치, 그 데이터 판독 방법 및 기록 매체 |
| JP2013127828A (ja) | 2011-12-16 | 2013-06-27 | Samsung Electronics Co Ltd | 半導体記憶装置 |
| US9552251B2 (en) * | 2014-04-22 | 2017-01-24 | Sandisk Technologies Llc | Neighboring word line program disturb countermeasure for charge-trapping memory |
| US9336891B2 (en) * | 2014-07-02 | 2016-05-10 | Sandisk Technologies Inc. | Look ahead read method for non-volatile memory |
| US9355732B2 (en) * | 2014-10-01 | 2016-05-31 | Sandisk Technologies Inc. | Latch initialization for a data storage device |
| KR102395722B1 (ko) * | 2015-09-17 | 2022-05-10 | 에스케이하이닉스 주식회사 | 저장 장치 및 이의 동작 방법 |
| US9548127B1 (en) | 2015-12-28 | 2017-01-17 | Kabushiki Kaisha Toshiba | Memory system |
| US10008273B2 (en) * | 2016-06-13 | 2018-06-26 | Sandisk Technologies Llc | Cell current based bit line voltage |
| KR102395563B1 (ko) * | 2016-07-25 | 2022-05-06 | 에스케이하이닉스 주식회사 | 비휘발성 메모리 소자 및 이의 제조 방법 |
| KR102489551B1 (ko) * | 2018-03-23 | 2023-01-17 | 에스케이하이닉스 주식회사 | 메모리 컨트롤러 및 그 동작 방법 |
| CN110648710A (zh) * | 2018-06-26 | 2020-01-03 | 北京兆易创新科技股份有限公司 | 字线电压的施加方法、装置、电子设备和存储介质 |
| WO2021102777A1 (en) * | 2019-11-28 | 2021-06-03 | Yangtze Memory Technologies Co., Ltd. | Methods of enhancing speed of reading data from memory device |
| US11670379B2 (en) * | 2020-12-04 | 2023-06-06 | Micron Technology, Inc. | Sense line structures in capacitive sense NAND memory |
| CN115458027B (zh) * | 2021-06-08 | 2026-05-29 | 中国科学院微电子研究所 | 一种测试存储器地址保持时间的方法、装置、设备及介质 |
| CN121153081A (zh) * | 2024-04-16 | 2025-12-16 | 长江存储科技有限责任公司 | 存储器装置、存储器系统及其操作方法 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100276653B1 (ko) * | 1998-08-27 | 2001-01-15 | 윤종용 | 스프릿 게이트형 불휘발성 메모리 셀의 구동방법 및 이 셀들을구비한 반도체 메모리 장치의 구동방법 |
| JP3913704B2 (ja) | 2003-04-22 | 2007-05-09 | 株式会社東芝 | 不揮発性半導体記憶装置及びこれを用いた電子装置 |
| JP3884448B2 (ja) | 2004-05-17 | 2007-02-21 | 株式会社東芝 | 半導体記憶装置 |
| US7372730B2 (en) * | 2004-01-26 | 2008-05-13 | Sandisk Corporation | Method of reading NAND memory to compensate for coupling between storage elements |
| US7187585B2 (en) * | 2005-04-05 | 2007-03-06 | Sandisk Corporation | Read operation for non-volatile storage that includes compensation for coupling |
| CN101395673B (zh) * | 2006-03-03 | 2011-09-21 | 桑迪士克股份有限公司 | 对浮动栅极耦合具有补偿的非易失性存储装置的读取操作 |
-
2007
- 2007-12-26 TW TW096150411A patent/TWI380311B/zh not_active IP Right Cessation
- 2007-12-27 JP JP2009544258A patent/JP5159790B2/ja not_active Expired - Fee Related
- 2007-12-27 WO PCT/US2007/088899 patent/WO2008083196A2/en not_active Ceased
- 2007-12-27 KR KR1020097016025A patent/KR101094422B1/ko not_active Expired - Fee Related
- 2007-12-27 CN CN2007800512402A patent/CN101627442B/zh not_active Expired - Fee Related
- 2007-12-27 EP EP07869948A patent/EP2100307B1/de not_active Not-in-force
- 2007-12-27 AT AT07869948T patent/ATE525727T1/de not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| JP2010515203A (ja) | 2010-05-06 |
| KR101094422B1 (ko) | 2011-12-15 |
| TWI380311B (en) | 2012-12-21 |
| CN101627442A (zh) | 2010-01-13 |
| CN101627442B (zh) | 2013-07-24 |
| EP2100307A2 (de) | 2009-09-16 |
| JP5159790B2 (ja) | 2013-03-13 |
| WO2008083196A2 (en) | 2008-07-10 |
| KR20090117713A (ko) | 2009-11-12 |
| WO2008083196A3 (en) | 2008-08-28 |
| TW200841346A (en) | 2008-10-16 |
| EP2100307B1 (de) | 2011-09-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |