ATE529808T1 - Verwaltungsmodul, hersteller- und verbraucherrechner, anordnung davon und verfahren zur kommunikation zwischen rechnern über einen gemeinsam verwendeten speicher - Google Patents

Verwaltungsmodul, hersteller- und verbraucherrechner, anordnung davon und verfahren zur kommunikation zwischen rechnern über einen gemeinsam verwendeten speicher

Info

Publication number
ATE529808T1
ATE529808T1 AT07101907T AT07101907T ATE529808T1 AT E529808 T1 ATE529808 T1 AT E529808T1 AT 07101907 T AT07101907 T AT 07101907T AT 07101907 T AT07101907 T AT 07101907T AT E529808 T1 ATE529808 T1 AT E529808T1
Authority
AT
Austria
Prior art keywords
arrangement
shared memory
manufacturer
communication
management module
Prior art date
Application number
AT07101907T
Other languages
English (en)
Inventor
Kai Roettger
Hamit Hacioglu
Original Assignee
Bosch Gmbh Robert
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bosch Gmbh Robert filed Critical Bosch Gmbh Robert
Application granted granted Critical
Publication of ATE529808T1 publication Critical patent/ATE529808T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
AT07101907T 2007-02-07 2007-02-07 Verwaltungsmodul, hersteller- und verbraucherrechner, anordnung davon und verfahren zur kommunikation zwischen rechnern über einen gemeinsam verwendeten speicher ATE529808T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP07101907A EP1956484B1 (de) 2007-02-07 2007-02-07 Verwaltungsmodul, Hersteller- und Verbraucherrechner, Anordnung davon und Verfahren zur Kommunikation zwischen Rechnern über einen gemeinsam verwendeten Speicher

Publications (1)

Publication Number Publication Date
ATE529808T1 true ATE529808T1 (de) 2011-11-15

Family

ID=38372380

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07101907T ATE529808T1 (de) 2007-02-07 2007-02-07 Verwaltungsmodul, hersteller- und verbraucherrechner, anordnung davon und verfahren zur kommunikation zwischen rechnern über einen gemeinsam verwendeten speicher

Country Status (6)

Country Link
US (1) US20100242051A1 (de)
EP (1) EP1956484B1 (de)
JP (1) JP2010501951A (de)
CN (1) CN101601016A (de)
AT (1) ATE529808T1 (de)
WO (1) WO2008095548A1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8723877B2 (en) * 2010-05-20 2014-05-13 Apple Inc. Subbuffer objects
WO2012069830A1 (en) * 2010-11-24 2012-05-31 Tte Systems Ltd A method and system for identifying the end of a task and for notifying a hardware scheduler thereof
KR102029806B1 (ko) * 2012-11-27 2019-10-08 삼성전자주식회사 선입선출 버퍼를 포함하는 시스템 온 칩, 응용 프로세서 및 그것을 포함하는 모바일 장치
US9176872B2 (en) * 2013-02-25 2015-11-03 Barco N.V. Wait-free algorithm for inter-core, inter-process, or inter-task communication
US20160026436A1 (en) * 2014-07-24 2016-01-28 Qualcomm Incorporated Dynamic Multi-processing In Multi-core Processors
US10037301B2 (en) * 2015-03-04 2018-07-31 Xilinx, Inc. Circuits and methods for inter-processor communication
DE102015214424A1 (de) * 2015-07-29 2017-02-02 Robert Bosch Gmbh Verfahren und Vorrichtung zum Kommunizieren zwischen virtuellen Maschinen
CN111432899B (zh) * 2017-09-19 2022-04-15 Bae系统控制有限公司 用于管理对共享端口的多核访问的系统和方法
WO2019065302A1 (ja) * 2017-09-27 2019-04-04 日立オートモティブシステムズ株式会社 車載マルチコア制御用データ伝達装置および電子制御装置
DE102019215291A1 (de) * 2019-10-04 2021-04-08 Robert Bosch Gmbh Verfahren, Computerprogramm, elektronisches Speichermedium und Vorrichtung zum Bereitstellen von einem Datum

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8711991D0 (en) * 1987-05-21 1987-06-24 British Aerospace Asynchronous communication systems
US5179665A (en) * 1987-06-24 1993-01-12 Westinghouse Electric Corp. Microprocessor information exchange with updating of messages by asynchronous processors using assigned and/or available buffers in dual port memory
JPH02310664A (ja) * 1989-05-26 1990-12-26 Hitachi Ltd 共有メモリを用いた通信方式
JPH11120156A (ja) * 1997-10-17 1999-04-30 Nec Corp マルチプロセッサシステムにおけるデータ通信方式
US6085276A (en) * 1997-10-24 2000-07-04 Compaq Computers Corporation Multi-processor computer system having a data switch with simultaneous insertion buffers for eliminating arbitration interdependencies
DE10003006A1 (de) * 2000-01-25 2001-07-26 Bosch Gmbh Robert Anordnung und Verfahren zur Signalverarbeitung und Speicherung
JP3706008B2 (ja) * 2000-08-01 2005-10-12 富士通株式会社 プロセッサ間データ通信装置、プロセッサ間データ通信方法およびデータ処理装置
WO2003052587A2 (en) * 2001-12-14 2003-06-26 Koninklijke Philips Electronics N.V. Data processing system
JP4536361B2 (ja) * 2003-11-28 2010-09-01 株式会社日立製作所 データ転送装置、記憶デバイス制御装置、記憶デバイス制御装置の制御方法

Also Published As

Publication number Publication date
CN101601016A (zh) 2009-12-09
EP1956484A1 (de) 2008-08-13
WO2008095548A1 (en) 2008-08-14
US20100242051A1 (en) 2010-09-23
JP2010501951A (ja) 2010-01-21
EP1956484B1 (de) 2011-10-19

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Legal Events

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