ATE529968T1 - Vorrichtung und verfahren zur ausführung eines kryptographischen algorithmus - Google Patents

Vorrichtung und verfahren zur ausführung eines kryptographischen algorithmus

Info

Publication number
ATE529968T1
ATE529968T1 AT02710985T AT02710985T ATE529968T1 AT E529968 T1 ATE529968 T1 AT E529968T1 AT 02710985 T AT02710985 T AT 02710985T AT 02710985 T AT02710985 T AT 02710985T AT E529968 T1 ATE529968 T1 AT E529968T1
Authority
AT
Austria
Prior art keywords
modulo
value
equal
cryptographic algorithm
executing
Prior art date
Application number
AT02710985T
Other languages
English (en)
Inventor
Marc Joye
Pascal Paillier
Jean-Sebastien Coron
Original Assignee
Gemalto Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemalto Sa filed Critical Gemalto Sa
Application granted granted Critical
Publication of ATE529968T1 publication Critical patent/ATE529968T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/723Modular exponentiation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002Countermeasures against attacks on cryptographic mechanisms
    • H04L9/004Countermeasures against attacks on cryptographic mechanisms for fault attacks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/30Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
    • H04L9/3006Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters
    • H04L9/302Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters involving the integer factorization problem, e.g. RSA or quadratic sieve [QS] schemes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/08Randomization, e.g. dummy operations or using noise

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Storage Device Security (AREA)
  • Circuits Of Receivers In General (AREA)
AT02710985T 2001-01-18 2002-01-11 Vorrichtung und verfahren zur ausführung eines kryptographischen algorithmus ATE529968T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0100688A FR2819663B1 (fr) 2001-01-18 2001-01-18 Dispositif et procede d'execution d'un algorithme cryptographique
PCT/FR2002/000113 WO2002058321A1 (fr) 2001-01-18 2002-01-11 Dispositif et procede d'execution d'un algorithme cryptographique

Publications (1)

Publication Number Publication Date
ATE529968T1 true ATE529968T1 (de) 2011-11-15

Family

ID=8858987

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02710985T ATE529968T1 (de) 2001-01-18 2002-01-11 Vorrichtung und verfahren zur ausführung eines kryptographischen algorithmus

Country Status (5)

Country Link
EP (1) EP1352494B1 (de)
AT (1) ATE529968T1 (de)
ES (1) ES2371333T3 (de)
FR (1) FR2819663B1 (de)
WO (1) WO2002058321A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004001659B4 (de) * 2004-01-12 2007-10-31 Infineon Technologies Ag Vorrichtung und Verfahren zum Konvertieren einer ersten Nachricht in eine zweite Nachricht
FR2867635B1 (fr) * 2004-03-11 2006-09-22 Oberthur Card Syst Sa Procede de traitement de donnees securise, base notamment sur un algorithme cryptographique
WO2006095281A1 (en) * 2005-03-08 2006-09-14 Nxp B.V. Arrangement for and method of protecting a data processing device against e[lectro] m[agnetic] radiation attacks
US8817974B2 (en) 2011-05-11 2014-08-26 Nxp B.V. Finite field cryptographic arithmetic resistant to fault attacks
EP3698262B1 (de) * 2017-10-18 2023-08-02 Cryptography Research, Inc. Schutz der modularen inversionsoperation vor externen überwachungsangriffen

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5991415A (en) * 1997-05-12 1999-11-23 Yeda Research And Development Co. Ltd. At The Weizmann Institute Of Science Method and apparatus for protecting public key schemes from timing and fault attacks
US6144740A (en) * 1998-05-20 2000-11-07 Network Security Technology Co. Method for designing public key cryptosystems against fault-based attacks with an implementation

Also Published As

Publication number Publication date
EP1352494B1 (de) 2011-10-19
FR2819663B1 (fr) 2003-04-11
ES2371333T3 (es) 2011-12-29
EP1352494A1 (de) 2003-10-15
WO2002058321A1 (fr) 2002-07-25
FR2819663A1 (fr) 2002-07-19

Similar Documents

Publication Publication Date Title
ATE474393T1 (de) Verfahren und vorrichtung zur authentifikation eines physischen gegenstandes
ATE332555T1 (de) Verfahren und system zur überwachung des orts einer vorrichtung
DE60044168D1 (de) Verfahren zur sicherung einer elektronischen verschlüsselungsvorrichtung mit geheimschlüssel gegen angriffe mittels physischer analyse
EP1745660A4 (de) System und verfahren zur abwicklung von wiederherstellungsoperationen auf mobilen einrichtungen
ATE476719T1 (de) Verhaltensbasierte anpassung von computersystemen
ATE484107T1 (de) Verfahren und vorrichtung zur ausgewählte demodulierung und decodierung von nachrichtenübertragungssignalen
ATE409898T1 (de) Zertifikat-validitätsprüfung
WO2006050615A8 (en) Searching for and providing objects using byte-by-byte comparison
ATE426858T1 (de) System und verfahren zum erkennen von bísartigem code
ATE336751T1 (de) Verfahren zum prüfen eines fingerabdrucks
ATE389986T1 (de) Verfahren und vorrichtung zur erzeugung und gemeinsamen nutzung eines systemschlüssels in einem drm-system
ATE271735T1 (de) Verfahren und vorrichtung zur begrenzung von frequenzbändern verwendet bei einer funkfrequenzvorrichtung mit niedriger leistungsaufnahme
ATE529968T1 (de) Vorrichtung und verfahren zur ausführung eines kryptographischen algorithmus
ATE400094T1 (de) System, verfahren und vorrichtung zur bestimmung der grenze eines informationselements
AU2001295555A1 (en) Method for generating a measuring program for a co-ordinate measuring device
ATE343797T1 (de) Vorrichtung zur bestimmung durch filtern von datenintegrität eines differentiellen positionierungssystems, für ein mobilgerät
ATE506645T1 (de) Verfahren und vorrichtung zur bereitstellung eines benutzerprioritätsmodus
DE502005005726D1 (de) Verfahren zum sicheren Berechnen eines Ergebniswerts bei einem Mikroprozessorsystem
DE50210455D1 (de) Verfahren zur erhöhung der sicherheit einer cpu
ATE366011T1 (de) Verfahren zur überwachung von computer systemen
ATE491189T1 (de) Chipkarte und verfahren zum schützen einer chipkarte
DE50309960D1 (de) Verfahren zur Bearbeitung eines Bildträgers zur Speicherung von Röntgeninformation
ATE294430T1 (de) Kryptographisches verfahren zum schutz eines elektronischen chips gegen betrug
ATE356516T1 (de) Verfahren zur berechnung des hashing einer nachricht in einer mit einer chipkarte kommunizierenden einrichtung
ATE345011T1 (de) Vorrichtung und verfahren zur sicheren fehlerbehandlung in geschützten kommunikationsnetzen

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties