ATE532209T1 - Halbleiterverarbeitungsverfahren zur bildung elektrischer kontakte und halbleiterstruktur - Google Patents
Halbleiterverarbeitungsverfahren zur bildung elektrischer kontakte und halbleiterstrukturInfo
- Publication number
- ATE532209T1 ATE532209T1 AT09001151T AT09001151T ATE532209T1 AT E532209 T1 ATE532209 T1 AT E532209T1 AT 09001151 T AT09001151 T AT 09001151T AT 09001151 T AT09001151 T AT 09001151T AT E532209 T1 ATE532209 T1 AT E532209T1
- Authority
- AT
- Austria
- Prior art keywords
- spacer structure
- electrical contacts
- semiconductor
- openings
- processing method
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/46—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a liquid
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
- H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/48—Data lines or contacts therefor
- H10B12/485—Bit line contacts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
- H10W20/057—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by selectively depositing, e.g. by using selective CVD or plating
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/083—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts the openings being via holes penetrating underlying conductors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/089—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/495—Capacitive arrangements or effects of, or between wiring layers
- H10W20/496—Capacitor integral with wiring layers
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Chemically Coating (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/822,030 US7005379B2 (en) | 2004-04-08 | 2004-04-08 | Semiconductor processing methods for forming electrical contacts |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE532209T1 true ATE532209T1 (de) | 2011-11-15 |
Family
ID=34964004
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT05730266T ATE486364T1 (de) | 2004-04-08 | 2005-03-23 | Halbleiterverarbeitungsverfahren zur bildung elektrischer kontakte und halbleiterstrukturen |
| AT09001151T ATE532209T1 (de) | 2004-04-08 | 2005-03-23 | Halbleiterverarbeitungsverfahren zur bildung elektrischer kontakte und halbleiterstruktur |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT05730266T ATE486364T1 (de) | 2004-04-08 | 2005-03-23 | Halbleiterverarbeitungsverfahren zur bildung elektrischer kontakte und halbleiterstrukturen |
Country Status (8)
| Country | Link |
|---|---|
| US (4) | US7005379B2 (de) |
| EP (2) | EP1733420B1 (de) |
| JP (1) | JP4811671B2 (de) |
| KR (1) | KR100799002B1 (de) |
| CN (1) | CN100485876C (de) |
| AT (2) | ATE486364T1 (de) |
| DE (1) | DE602005024377D1 (de) |
| WO (1) | WO2005104190A2 (de) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7005379B2 (en) * | 2004-04-08 | 2006-02-28 | Micron Technology, Inc. | Semiconductor processing methods for forming electrical contacts |
| US7098128B2 (en) * | 2004-09-01 | 2006-08-29 | Micron Technology, Inc. | Method for filling electrically different features |
| US7557015B2 (en) * | 2005-03-18 | 2009-07-07 | Micron Technology, Inc. | Methods of forming pluralities of capacitors |
| US7544563B2 (en) * | 2005-05-18 | 2009-06-09 | Micron Technology, Inc. | Methods of forming a plurality of capacitors |
| US7902081B2 (en) * | 2006-10-11 | 2011-03-08 | Micron Technology, Inc. | Methods of etching polysilicon and methods of forming pluralities of capacitors |
| US20080136019A1 (en) * | 2006-12-11 | 2008-06-12 | Johnson Michael E | Solder Bump/Under Bump Metallurgy Structure for High Temperature Applications |
| US7785962B2 (en) * | 2007-02-26 | 2010-08-31 | Micron Technology, Inc. | Methods of forming a plurality of capacitors |
| US7923373B2 (en) | 2007-06-04 | 2011-04-12 | Micron Technology, Inc. | Pitch multiplication using self-assembling materials |
| US7682924B2 (en) * | 2007-08-13 | 2010-03-23 | Micron Technology, Inc. | Methods of forming a plurality of capacitors |
| US8388851B2 (en) | 2008-01-08 | 2013-03-05 | Micron Technology, Inc. | Capacitor forming methods |
| US8274777B2 (en) | 2008-04-08 | 2012-09-25 | Micron Technology, Inc. | High aspect ratio openings |
| US7759193B2 (en) * | 2008-07-09 | 2010-07-20 | Micron Technology, Inc. | Methods of forming a plurality of capacitors |
| US20100224960A1 (en) * | 2009-03-04 | 2010-09-09 | Kevin John Fischer | Embedded capacitor device and methods of fabrication |
| US8518788B2 (en) | 2010-08-11 | 2013-08-27 | Micron Technology, Inc. | Methods of forming a plurality of capacitors |
| US9988734B2 (en) | 2011-08-15 | 2018-06-05 | Lam Research Corporation | Lipseals and contact elements for semiconductor electroplating apparatuses |
| US9076680B2 (en) | 2011-10-18 | 2015-07-07 | Micron Technology, Inc. | Integrated circuitry, methods of forming capacitors, and methods of forming integrated circuitry comprising an array of capacitors and circuitry peripheral to the array |
| US8946043B2 (en) | 2011-12-21 | 2015-02-03 | Micron Technology, Inc. | Methods of forming capacitors |
| US8652926B1 (en) | 2012-07-26 | 2014-02-18 | Micron Technology, Inc. | Methods of forming capacitors |
| JP6396653B2 (ja) * | 2013-10-30 | 2018-09-26 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP6745103B2 (ja) * | 2014-11-26 | 2020-08-26 | ノベラス・システムズ・インコーポレーテッドNovellus Systems Incorporated | 半導体電気メッキ装置用のリップシールおよび接触要素 |
| US10053793B2 (en) | 2015-07-09 | 2018-08-21 | Lam Research Corporation | Integrated elastomeric lipseal and cup bottom for reducing wafer sticking |
| TWI799498B (zh) * | 2018-02-05 | 2023-04-21 | 日商東京威力科創股份有限公司 | 多層配線之形成方法、多層配線形成裝置及記憶媒體 |
| TWI833730B (zh) * | 2018-02-21 | 2024-03-01 | 日商東京威力科創股份有限公司 | 多層配線之形成方法及記憶媒體 |
Family Cites Families (30)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6315443A (ja) | 1986-07-08 | 1988-01-22 | Oki Electric Ind Co Ltd | 多層配線の製造方法 |
| US5169680A (en) | 1987-05-07 | 1992-12-08 | Intel Corporation | Electroless deposition for IC fabrication |
| NL8900305A (nl) | 1989-02-08 | 1990-09-03 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting. |
| JP2897297B2 (ja) | 1989-12-19 | 1999-05-31 | 富士通株式会社 | 半導体装置の製造方法 |
| FR2656493A1 (fr) | 1989-12-21 | 1991-06-28 | Bull Sa | Procede d'interconnexion de couches metalliques du reseau multicouche d'une carte electronique, et carte en resultant. |
| JPH04127425A (ja) * | 1990-09-18 | 1992-04-28 | Nec Corp | 半導体集積回路の製造方法 |
| JP3190136B2 (ja) | 1992-10-02 | 2001-07-23 | サンスター技研株式会社 | 積層材の製造方法 |
| JP2663831B2 (ja) | 1993-05-10 | 1997-10-15 | 株式会社イナックス | 洗面設備 |
| US6744091B1 (en) | 1995-01-31 | 2004-06-01 | Fujitsu Limited | Semiconductor storage device with self-aligned opening and method for fabricating the same |
| JP3623834B2 (ja) * | 1995-01-31 | 2005-02-23 | 富士通株式会社 | 半導体記憶装置及びその製造方法 |
| JP3323352B2 (ja) * | 1995-02-13 | 2002-09-09 | 三菱電機株式会社 | 半導体装置 |
| US5950102A (en) * | 1997-02-03 | 1999-09-07 | Industrial Technology Research Institute | Method for fabricating air-insulated multilevel metal interconnections for integrated circuits |
| JPH10242418A (ja) * | 1997-02-25 | 1998-09-11 | Sony Corp | Dramおよびその製造方法 |
| JP3697044B2 (ja) * | 1997-12-19 | 2005-09-21 | 株式会社ルネサステクノロジ | 半導体集積回路装置およびその製造方法 |
| US6344413B1 (en) * | 1997-12-22 | 2002-02-05 | Motorola Inc. | Method for forming a semiconductor device |
| US6785193B2 (en) * | 2000-06-20 | 2004-08-31 | Frank P. Forbath | Medical timing system for use before and during childbirth labor |
| JP4895420B2 (ja) * | 2000-08-10 | 2012-03-14 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| US6511912B1 (en) * | 2000-08-22 | 2003-01-28 | Micron Technology, Inc. | Method of forming a non-conformal layer over and exposing a trench |
| JP4481464B2 (ja) * | 2000-09-20 | 2010-06-16 | 株式会社東芝 | 半導体記憶装置及びその製造方法 |
| JP3542326B2 (ja) * | 2000-09-26 | 2004-07-14 | 株式会社半導体理工学研究センター | 多層配線構造の製造方法 |
| US6462368B2 (en) * | 2000-10-31 | 2002-10-08 | Hitachi, Ltd. | Ferroelectric capacitor with a self-aligned diffusion barrier |
| JP2004022551A (ja) * | 2002-06-12 | 2004-01-22 | Oki Electric Ind Co Ltd | 半導体素子の製造方法 |
| US20070076509A1 (en) * | 2002-08-28 | 2007-04-05 | Guobiao Zhang | Three-Dimensional Mask-Programmable Read-Only Memory |
| US6784510B1 (en) * | 2003-04-16 | 2004-08-31 | Freescale Semiconductor, Inc. | Magnetoresistive random access memory device structures |
| JP3646719B2 (ja) * | 2003-06-19 | 2005-05-11 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、回路基板並びに電子機器 |
| DE10333204A1 (de) | 2003-07-22 | 2005-02-24 | Conti Temic Microelectronic Gmbh | Verfahren und Vorrichtung zur Druckmessung |
| US7294565B2 (en) * | 2003-10-01 | 2007-11-13 | International Business Machines Corporation | Method of fabricating a wire bond pad with Ni/Au metallization |
| US7091124B2 (en) * | 2003-11-13 | 2006-08-15 | Micron Technology, Inc. | Methods for forming vias in microelectronic devices, and methods for packaging microelectronic devices |
| US6943106B1 (en) * | 2004-02-20 | 2005-09-13 | Micron Technology, Inc. | Methods of fabricating interconnects for semiconductor components including plating solder-wetting material and solder filling |
| US7005379B2 (en) * | 2004-04-08 | 2006-02-28 | Micron Technology, Inc. | Semiconductor processing methods for forming electrical contacts |
-
2004
- 2004-04-08 US US10/822,030 patent/US7005379B2/en not_active Expired - Fee Related
-
2005
- 2005-03-23 WO PCT/US2005/009781 patent/WO2005104190A2/en not_active Ceased
- 2005-03-23 DE DE602005024377T patent/DE602005024377D1/de not_active Expired - Lifetime
- 2005-03-23 AT AT05730266T patent/ATE486364T1/de not_active IP Right Cessation
- 2005-03-23 EP EP05730266A patent/EP1733420B1/de not_active Expired - Lifetime
- 2005-03-23 JP JP2007507341A patent/JP4811671B2/ja not_active Expired - Lifetime
- 2005-03-23 AT AT09001151T patent/ATE532209T1/de active
- 2005-03-23 CN CNB2005800182460A patent/CN100485876C/zh not_active Expired - Lifetime
- 2005-03-23 EP EP09001151A patent/EP2051295B1/de not_active Expired - Lifetime
- 2005-03-23 KR KR1020067020548A patent/KR100799002B1/ko not_active Expired - Lifetime
- 2005-07-22 US US11/188,235 patent/US7335935B2/en not_active Expired - Lifetime
-
2008
- 2008-01-02 US US11/968,281 patent/US7713817B2/en not_active Expired - Lifetime
-
2010
- 2010-03-31 US US12/751,786 patent/US8232206B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| KR20060130708A (ko) | 2006-12-19 |
| JP2007533134A (ja) | 2007-11-15 |
| US20100190314A1 (en) | 2010-07-29 |
| EP2051295B1 (de) | 2011-11-02 |
| US7713817B2 (en) | 2010-05-11 |
| US20050224981A1 (en) | 2005-10-13 |
| CN1973361A (zh) | 2007-05-30 |
| US20080102596A1 (en) | 2008-05-01 |
| EP2051295A3 (de) | 2010-11-03 |
| JP4811671B2 (ja) | 2011-11-09 |
| ATE486364T1 (de) | 2010-11-15 |
| US20060003583A1 (en) | 2006-01-05 |
| EP1733420B1 (de) | 2010-10-27 |
| EP1733420A2 (de) | 2006-12-20 |
| US7005379B2 (en) | 2006-02-28 |
| WO2005104190A2 (en) | 2005-11-03 |
| EP2051295A2 (de) | 2009-04-22 |
| WO2005104190A3 (en) | 2006-02-23 |
| CN100485876C (zh) | 2009-05-06 |
| KR100799002B1 (ko) | 2008-01-28 |
| DE602005024377D1 (de) | 2010-12-09 |
| US7335935B2 (en) | 2008-02-26 |
| US8232206B2 (en) | 2012-07-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ATE532209T1 (de) | Halbleiterverarbeitungsverfahren zur bildung elektrischer kontakte und halbleiterstruktur | |
| TW200731898A (en) | Circuit board structure and method for fabricating the same | |
| TW200741829A (en) | Methods of forming through-wafer interconnects and structures resulting therefrom | |
| TW200503184A (en) | Polymer memory device formed in via opening | |
| WO2007030672A3 (en) | Patterned electroless metallization processes for large area electronics | |
| JP2004530289A5 (de) | ||
| EP1978472A3 (de) | Halbleiterbauelement und Verfahren zu seiner Herstellung | |
| TW200515568A (en) | Circuit barrier structure of semiconductor package substrate and method for fabricating the same | |
| EP1871153A3 (de) | Leitersubstrat und Herstellungsverfahren dafür sowie Halbleitervorrichtung | |
| TW200742249A (en) | Semiconductor device, manufacturing method for semiconductor device, electronic component, circuit substrate, and electronic apparatus | |
| TW200511458A (en) | Flip-chip type semiconductor device, production process for manufacturing such flip-chip type semiconductor device, and production process for manufacturing electronic product using such flip-chip type semiconductor device | |
| TW200721561A (en) | A large area organic diode device and a method of manufacturing it | |
| EP1856727A4 (de) | Verbindungsisolierte durchgänge | |
| TW200601917A (en) | Method for fabricating electrical connection structure of circuit board | |
| EP2048712A3 (de) | Elektronisches Vorrichtungsherstellungsverfahren und elektronische Vorrichtung | |
| WO2007025521A3 (de) | Verfahren zur herstellung eines halbleiterbauelements mit einer planaren kontaktierung und halbleiterbauelement | |
| WO2009033728A3 (en) | Sensor matrix with semiconductor components | |
| TW200610466A (en) | Method for fabricating conductive bumps of a circuit board | |
| WO2008070568A3 (en) | Apparatus and method for electroplating on a solar cell substrate | |
| GB2466163A (en) | Semiconductor structure comprising an electrically conductive feature and method of forming a semiconductor structure | |
| TW200620545A (en) | Robust copper interconnection structire and fabrication method thereof | |
| TW200735349A (en) | Semiconductor devices having plated contacts, and methods of manufacturing the same | |
| EP1367645A3 (de) | Halbleiteranordnung und ihre Herstellung | |
| WO2005006432A3 (de) | Elektronisches bauelement und verfahren zur herstellung | |
| TW200625724A (en) | Anisotropic conductive connector for wafer inspection, production method and application therefor |