ATE535865T1 - Halbleiterspeichervorrichtung und steuerungsverfahren dafür - Google Patents

Halbleiterspeichervorrichtung und steuerungsverfahren dafür

Info

Publication number
ATE535865T1
ATE535865T1 AT08834693T AT08834693T ATE535865T1 AT E535865 T1 ATE535865 T1 AT E535865T1 AT 08834693 T AT08834693 T AT 08834693T AT 08834693 T AT08834693 T AT 08834693T AT E535865 T1 ATE535865 T1 AT E535865T1
Authority
AT
Austria
Prior art keywords
data items
memory device
semiconductor memory
rows
columns
Prior art date
Application number
AT08834693T
Other languages
English (en)
Inventor
Shinichi Kanno
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Application granted granted Critical
Publication of ATE535865T1 publication Critical patent/ATE535865T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Error Detection And Correction (AREA)
AT08834693T 2007-09-26 2008-07-17 Halbleiterspeichervorrichtung und steuerungsverfahren dafür ATE535865T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007249509A JP4538034B2 (ja) 2007-09-26 2007-09-26 半導体記憶装置、及びその制御方法
PCT/JP2008/063345 WO2009041153A1 (en) 2007-09-26 2008-07-17 Semiconductor memory device and its control method

Publications (1)

Publication Number Publication Date
ATE535865T1 true ATE535865T1 (de) 2011-12-15

Family

ID=40027222

Family Applications (1)

Application Number Title Priority Date Filing Date
AT08834693T ATE535865T1 (de) 2007-09-26 2008-07-17 Halbleiterspeichervorrichtung und steuerungsverfahren dafür

Country Status (8)

Country Link
US (1) US7900117B2 (de)
EP (1) EP2203819B1 (de)
JP (1) JP4538034B2 (de)
KR (1) KR100996770B1 (de)
CN (1) CN101622604B (de)
AT (1) ATE535865T1 (de)
TW (1) TWI406289B (de)
WO (1) WO2009041153A1 (de)

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JP2012137994A (ja) 2010-12-27 2012-07-19 Toshiba Corp メモリシステムおよびその制御方法
US8484542B2 (en) * 2011-02-08 2013-07-09 Sandisk Technologies Inc. Data recovery using additional error correction coding data
JP5269932B2 (ja) 2011-03-01 2013-08-21 株式会社東芝 コントローラ、データ記憶装置およびプログラム
JP2011210277A (ja) * 2011-06-20 2011-10-20 Toshiba Corp 情報処理装置および情報処理方法
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CN106817192B (zh) * 2015-11-30 2020-08-14 华为技术有限公司 一种错误估计的方法、基站及终端
CN111902804B (zh) 2018-06-25 2024-03-01 阿里巴巴集团控股有限公司 用于管理存储设备的资源并量化i/o请求成本的系统和方法
US11216333B2 (en) * 2018-10-16 2022-01-04 Micron Technology, Inc. Methods and devices for error correction
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JP7438859B2 (ja) * 2020-06-17 2024-02-27 キオクシア株式会社 メモリシステムおよび方法
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Also Published As

Publication number Publication date
KR20090115188A (ko) 2009-11-04
EP2203819B1 (de) 2011-11-30
CN101622604B (zh) 2012-05-30
JP2009080651A (ja) 2009-04-16
US7900117B2 (en) 2011-03-01
KR100996770B1 (ko) 2010-11-25
US20090177944A1 (en) 2009-07-09
TWI406289B (zh) 2013-08-21
WO2009041153A1 (en) 2009-04-02
CN101622604A (zh) 2010-01-06
TW200917265A (en) 2009-04-16
JP4538034B2 (ja) 2010-09-08
EP2203819A1 (de) 2010-07-07

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