ATE539346T1 - Verfahren zur enthüllung von kristallinen defekten in einem massiven substrat - Google Patents

Verfahren zur enthüllung von kristallinen defekten in einem massiven substrat

Info

Publication number
ATE539346T1
ATE539346T1 AT07105297T AT07105297T ATE539346T1 AT E539346 T1 ATE539346 T1 AT E539346T1 AT 07105297 T AT07105297 T AT 07105297T AT 07105297 T AT07105297 T AT 07105297T AT E539346 T1 ATE539346 T1 AT E539346T1
Authority
AT
Austria
Prior art keywords
revealing
carried out
heat treatment
bulk
stage
Prior art date
Application number
AT07105297T
Other languages
English (en)
Inventor
Oleg Kononchuck
Christophe Maleville
Patrick Reynaud
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Application granted granted Critical
Publication of ATE539346T1 publication Critical patent/ATE539346T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/9501—Semiconductor wafers

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Measuring Temperature Or Quantity Of Heat (AREA)
AT07105297T 2006-03-31 2007-03-30 Verfahren zur enthüllung von kristallinen defekten in einem massiven substrat ATE539346T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0602786A FR2899380B1 (fr) 2006-03-31 2006-03-31 Procede de revelation de defauts cristallins dans un substrat massif.

Publications (1)

Publication Number Publication Date
ATE539346T1 true ATE539346T1 (de) 2012-01-15

Family

ID=37081642

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07105297T ATE539346T1 (de) 2006-03-31 2007-03-30 Verfahren zur enthüllung von kristallinen defekten in einem massiven substrat

Country Status (9)

Country Link
US (1) US7413964B2 (de)
EP (1) EP1840560B1 (de)
JP (1) JP5032168B2 (de)
KR (1) KR100821970B1 (de)
CN (1) CN101055847B (de)
AT (1) ATE539346T1 (de)
FR (1) FR2899380B1 (de)
SG (1) SG136098A1 (de)
TW (1) TWI383469B (de)

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US8173449B2 (en) * 2006-06-09 2012-05-08 Sumco Corporation Method for making COP evaluation on single-crystal silicon wafer
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JP5728153B2 (ja) * 2008-09-26 2015-06-03 株式会社東芝 半導体装置の製造方法
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture
SG166060A1 (en) 2009-04-22 2010-11-29 Semiconductor Energy Lab Method of manufacturing soi substrate
US8318588B2 (en) * 2009-08-25 2012-11-27 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate
SG178179A1 (en) * 2009-10-09 2012-03-29 Semiconductor Energy Lab Reprocessing method of semiconductor substrate, manufacturing method of reprocessed semiconductor substrate, and manufacturing method of soi substrate
SG173283A1 (en) * 2010-01-26 2011-08-29 Semiconductor Energy Lab Method for manufacturing soi substrate
US9123529B2 (en) 2011-06-21 2015-09-01 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate
FR2977974B1 (fr) * 2011-07-13 2014-03-07 Soitec Silicon On Insulator Procede de mesure de defauts dans un substrat de silicium
JP5440564B2 (ja) 2011-07-14 2014-03-12 信越半導体株式会社 結晶欠陥の検出方法
US9343379B2 (en) * 2011-10-14 2016-05-17 Sunedison Semiconductor Limited Method to delineate crystal related defects
FR2987682B1 (fr) 2012-03-05 2014-11-21 Soitec Silicon On Insulator Procede de test d'une structure semi-conducteur sur isolant et application dudit test pour la fabrication d'une telle structure
FR2999801B1 (fr) 2012-12-14 2014-12-26 Soitec Silicon On Insulator Procede de fabrication d'une structure
CN104201093B (zh) * 2014-08-08 2017-02-01 上海华力微电子有限公司 湿法清洗工艺设备颗粒监控方法
JP6627800B2 (ja) * 2017-02-21 2020-01-08 信越半導体株式会社 シリコン単結晶ウエハの欠陥領域判定方法
JP6380582B1 (ja) * 2017-03-08 2018-08-29 株式会社Sumco エピタキシャルウェーハの裏面検査方法、エピタキシャルウェーハ裏面検査装置、エピタキシャル成長装置のリフトピン管理方法およびエピタキシャルウェーハの製造方法
KR102725589B1 (ko) * 2019-02-15 2024-11-05 에스케이실트론 주식회사 웨이퍼손상평가방법
CN113394126A (zh) * 2021-04-15 2021-09-14 上海新昇半导体科技有限公司 一种检测半导体材料中缺陷的方法
CN113421944B (zh) * 2021-05-18 2022-08-23 平煤隆基新能源科技有限公司 一种提高晶硅太阳能电池转换效率的氧化退火工艺
CN113818079A (zh) * 2021-08-06 2021-12-21 西南技术物理研究所 一种Ho：BYF单晶生长用气氛系统
JP7716968B2 (ja) * 2021-12-17 2025-08-01 株式会社日立製作所 半導体デバイス管理システム及び半導体デバイス管理方法

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JPH0684925A (ja) * 1992-07-17 1994-03-25 Toshiba Corp 半導体基板およびその処理方法
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JP4380141B2 (ja) * 2002-10-31 2009-12-09 信越半導体株式会社 シリコンウェーハの評価方法
JP4794810B2 (ja) * 2003-03-20 2011-10-19 シャープ株式会社 半導体装置の製造方法
JP4670224B2 (ja) * 2003-04-01 2011-04-13 株式会社Sumco シリコンウェーハの製造方法
GB0308182D0 (en) * 2003-04-09 2003-05-14 Aoti Operating Co Inc Detection method and apparatus
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JP4653948B2 (ja) 2003-11-26 2011-03-16 信越半導体株式会社 エピタキシャルウエーハ用シリコン単結晶の検査方法及びエピタキシャルウエーハ用シリコンウエーハの製造方法、並びにエピタキシャルウエーハの製造方法
JP2005162599A (ja) * 2003-12-03 2005-06-23 Siltron Inc 均一なベイカンシ欠陥を有するシリコン単結晶インゴット、シリコンウエハ、シリコン単結晶インゴットの製造装置、及びシリコン単結晶インゴットの製造方法
DE102005028202B4 (de) * 2005-06-17 2010-04-15 Siltronic Ag Verfahren zur Herstellung von Halbleiterscheiben aus Silizium

Also Published As

Publication number Publication date
JP5032168B2 (ja) 2012-09-26
EP1840560A2 (de) 2007-10-03
SG136098A1 (en) 2007-10-29
US7413964B2 (en) 2008-08-19
KR100821970B1 (ko) 2008-04-15
JP2007273977A (ja) 2007-10-18
FR2899380B1 (fr) 2008-08-29
EP1840560A3 (de) 2009-07-01
TWI383469B (zh) 2013-01-21
FR2899380A1 (fr) 2007-10-05
CN101055847B (zh) 2010-07-21
CN101055847A (zh) 2007-10-17
TW200739801A (en) 2007-10-16
KR20070098489A (ko) 2007-10-05
US20070231932A1 (en) 2007-10-04
EP1840560B1 (de) 2011-12-28

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