ATE540425T1 - Entfluorisierungsprozess - Google Patents
EntfluorisierungsprozessInfo
- Publication number
- ATE540425T1 ATE540425T1 AT07843846T AT07843846T ATE540425T1 AT E540425 T1 ATE540425 T1 AT E540425T1 AT 07843846 T AT07843846 T AT 07843846T AT 07843846 T AT07843846 T AT 07843846T AT E540425 T1 ATE540425 T1 AT E540425T1
- Authority
- AT
- Austria
- Prior art keywords
- layer
- photoresist
- features
- critical dimension
- fluorine
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
- H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
- H10P76/2041—Photolithographic processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/089—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
- H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
- H10P14/6532—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour by exposure to a plasma
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
- H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
- H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/71—Etching of wafers, substrates or parts of devices using masks for conductive or resistive materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/04—Apparatus for manufacture or treatment
- H10P72/0402—Apparatus for fluid treatment
- H10P72/0418—Apparatus for fluid treatment for etching
- H10P72/0421—Apparatus for fluid treatment for etching for drying etching
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
- H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
- H10P76/4085—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
- H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
- H10P76/4088—Processes for improving the resolution of the masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P95/08—Planarisation of organic insulating materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/68—Organic materials, e.g. photoresists
- H10P14/683—Organic materials, e.g. photoresists carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC
- H10P14/687—Organic materials, e.g. photoresists carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC the materials being fluorocarbon compounds, e.g. (CHxFy) n or polytetrafluoroethylene
Landscapes
- Drying Of Semiconductors (AREA)
- Saccharide Compounds (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/545,903 US7309646B1 (en) | 2006-10-10 | 2006-10-10 | De-fluoridation process |
| PCT/US2007/080455 WO2008045764A1 (en) | 2006-10-10 | 2007-10-04 | De-fluoridation process |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE540425T1 true ATE540425T1 (de) | 2012-01-15 |
Family
ID=38825919
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT07843846T ATE540425T1 (de) | 2006-10-10 | 2007-10-04 | Entfluorisierungsprozess |
Country Status (8)
| Country | Link |
|---|---|
| US (2) | US7309646B1 (de) |
| EP (1) | EP2074648B1 (de) |
| JP (1) | JP5081917B2 (de) |
| KR (1) | KR101411797B1 (de) |
| CN (1) | CN101523567B (de) |
| AT (1) | ATE540425T1 (de) |
| TW (1) | TWI420594B (de) |
| WO (1) | WO2008045764A1 (de) |
Families Citing this family (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7695632B2 (en) * | 2005-05-31 | 2010-04-13 | Lam Research Corporation | Critical dimension reduction and roughness control |
| US8182458B2 (en) | 2006-10-04 | 2012-05-22 | First Quality Products, Inc. | Fastener with adhesive blocker |
| US8283255B2 (en) * | 2007-05-24 | 2012-10-09 | Lam Research Corporation | In-situ photoresist strip during plasma etching of active hard mask |
| US8277670B2 (en) * | 2008-05-13 | 2012-10-02 | Lam Research Corporation | Plasma process with photoresist mask pretreatment |
| JP5357710B2 (ja) * | 2009-11-16 | 2013-12-04 | 東京エレクトロン株式会社 | 基板処理方法,基板処理装置,プログラムを記録した記録媒体 |
| US9117767B2 (en) * | 2011-07-21 | 2015-08-25 | Lam Research Corporation | Negative ion control for dielectric etch |
| US20120094494A1 (en) * | 2010-10-14 | 2012-04-19 | Macronix International Co., Ltd. | Methods for etching multi-layer hardmasks |
| US8304262B2 (en) * | 2011-02-17 | 2012-11-06 | Lam Research Corporation | Wiggling control for pseudo-hardmask |
| JP6355374B2 (ja) * | 2013-03-22 | 2018-07-11 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US8883648B1 (en) * | 2013-09-09 | 2014-11-11 | United Microelectronics Corp. | Manufacturing method of semiconductor structure |
| CN104465386A (zh) * | 2013-09-24 | 2015-03-25 | 中芯国际集成电路制造(北京)有限公司 | 半导体结构的形成方法 |
| US10658222B2 (en) | 2015-01-16 | 2020-05-19 | Lam Research Corporation | Moveable edge coupling ring for edge process control during semiconductor wafer processing |
| US9911620B2 (en) | 2015-02-23 | 2018-03-06 | Lam Research Corporation | Method for achieving ultra-high selectivity while etching silicon nitride |
| US10957561B2 (en) | 2015-07-30 | 2021-03-23 | Lam Research Corporation | Gas delivery system |
| US9837286B2 (en) | 2015-09-04 | 2017-12-05 | Lam Research Corporation | Systems and methods for selectively etching tungsten in a downstream reactor |
| US10192751B2 (en) | 2015-10-15 | 2019-01-29 | Lam Research Corporation | Systems and methods for ultrahigh selective nitride etch |
| WO2017111822A1 (en) * | 2015-12-24 | 2017-06-29 | Intel Corporation | Pitch division using directed self-assembly |
| US10825659B2 (en) | 2016-01-07 | 2020-11-03 | Lam Research Corporation | Substrate processing chamber including multiple gas injection points and dual injector |
| US10699878B2 (en) | 2016-02-12 | 2020-06-30 | Lam Research Corporation | Chamber member of a plasma source and pedestal with radially outward positioned lift pins for translation of a substrate c-ring |
| US10147588B2 (en) | 2016-02-12 | 2018-12-04 | Lam Research Corporation | System and method for increasing electron density levels in a plasma of a substrate processing system |
| US10651015B2 (en) | 2016-02-12 | 2020-05-12 | Lam Research Corporation | Variable depth edge ring for etch uniformity control |
| US10438833B2 (en) | 2016-02-16 | 2019-10-08 | Lam Research Corporation | Wafer lift ring system for wafer transfer |
| US10410832B2 (en) | 2016-08-19 | 2019-09-10 | Lam Research Corporation | Control of on-wafer CD uniformity with movable edge ring and gas injection adjustment |
| JP6561093B2 (ja) * | 2017-07-24 | 2019-08-14 | 東京エレクトロン株式会社 | シリコン酸化膜を除去する方法 |
| EP3444671A1 (de) * | 2017-08-18 | 2019-02-20 | IMEC vzw | Herstellung einer maskenschicht |
| US10727045B2 (en) | 2017-09-29 | 2020-07-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for manufacturing a semiconductor device |
| KR102617972B1 (ko) | 2017-11-21 | 2023-12-22 | 램 리써치 코포레이션 | 하단 링 및 중간 에지 링 |
| JP7137927B2 (ja) * | 2017-12-20 | 2022-09-15 | キオクシア株式会社 | 半導体装置の製造方法 |
| US10566194B2 (en) | 2018-05-07 | 2020-02-18 | Lam Research Corporation | Selective deposition of etch-stop layer for enhanced patterning |
| JP2020009840A (ja) * | 2018-07-04 | 2020-01-16 | 東京エレクトロン株式会社 | エッチング方法及び基板処理装置 |
| KR20210111872A (ko) | 2018-08-13 | 2021-09-13 | 램 리써치 코포레이션 | 에지 링 포지셔닝 및 센터링 피처들을 포함하는 플라즈마 시스 튜닝을 위한 교체가능한 에지 링 어셈블리 및/또는 접을 수 있는 에지 링 어셈블리 |
| US12444579B2 (en) | 2020-03-23 | 2025-10-14 | Lam Research Corporation | Mid-ring erosion compensation in substrate processing systems |
Family Cites Families (57)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5378170A (en) | 1976-12-22 | 1978-07-11 | Toshiba Corp | Continuous processor for gas plasma etching |
| US4871630A (en) | 1986-10-28 | 1989-10-03 | International Business Machines Corporation | Mask using lithographic image size reduction |
| US5013680A (en) * | 1990-07-18 | 1991-05-07 | Micron Technology, Inc. | Process for fabricating a DRAM array having feature widths that transcend the resolution limit of available photolithography |
| US5273609A (en) | 1990-09-12 | 1993-12-28 | Texas Instruments Incorporated | Method and apparatus for time-division plasma chopping in a multi-channel plasma processing equipment |
| DE4241045C1 (de) | 1992-12-05 | 1994-05-26 | Bosch Gmbh Robert | Verfahren zum anisotropen Ätzen von Silicium |
| US5296410A (en) | 1992-12-16 | 1994-03-22 | Samsung Electronics Co., Ltd. | Method for separating fine patterns of a semiconductor device |
| JPH08195380A (ja) * | 1995-01-13 | 1996-07-30 | Sony Corp | コンタクトホールの形成方法 |
| JP3685832B2 (ja) * | 1995-02-28 | 2005-08-24 | ソニー株式会社 | 半導体装置の製造方法 |
| JPH0997833A (ja) * | 1995-07-22 | 1997-04-08 | Ricoh Co Ltd | 半導体装置とその製造方法 |
| US5879853A (en) * | 1996-01-18 | 1999-03-09 | Kabushiki Kaisha Toshiba | Top antireflective coating material and its process for DUV and VUV lithography systems |
| US5741626A (en) * | 1996-04-15 | 1998-04-21 | Motorola, Inc. | Method for forming a dielectric tantalum nitride layer as an anti-reflective coating (ARC) |
| GB9616225D0 (en) | 1996-08-01 | 1996-09-11 | Surface Tech Sys Ltd | Method of surface treatment of semiconductor substrates |
| EP1357584A3 (de) * | 1996-08-01 | 2005-01-12 | Surface Technology Systems Plc | Verfahren zur Oberflachensbehandlung von halbleitenden Substraten |
| US5895740A (en) | 1996-11-13 | 1999-04-20 | Vanguard International Semiconductor Corp. | Method of forming contact holes of reduced dimensions by using in-situ formed polymeric sidewall spacers |
| US6114216A (en) * | 1996-11-13 | 2000-09-05 | Applied Materials, Inc. | Methods for shallow trench isolation |
| US5907775A (en) * | 1997-04-11 | 1999-05-25 | Vanguard International Semiconductor Corporation | Non-volatile memory device with high gate coupling ratio and manufacturing process therefor |
| US6187685B1 (en) | 1997-08-01 | 2001-02-13 | Surface Technology Systems Limited | Method and apparatus for etching a substrate |
| US6218288B1 (en) * | 1998-05-11 | 2001-04-17 | Micron Technology, Inc. | Multiple step methods for forming conformal layers |
| US6100014A (en) * | 1998-11-24 | 2000-08-08 | United Microelectronics Corp. | Method of forming an opening in a dielectric layer through a photoresist layer with silylated sidewall spacers |
| JP4714309B2 (ja) * | 1998-12-11 | 2011-06-29 | サーフィス テクノロジー システムズ ピーエルシー | プラズマ加工装置 |
| US6162733A (en) * | 1999-01-15 | 2000-12-19 | Lucent Technologies Inc. | Method for removing contaminants from integrated circuits |
| US6368974B1 (en) | 1999-08-02 | 2002-04-09 | United Microelectronics Corp. | Shrinking equal effect critical dimension of mask by in situ polymer deposition and etching |
| JP2002110654A (ja) * | 2000-10-04 | 2002-04-12 | Sony Corp | 半導体装置の製造方法 |
| JP2002129337A (ja) * | 2000-10-24 | 2002-05-09 | Applied Materials Inc | 気相堆積方法及び装置 |
| US6905800B1 (en) * | 2000-11-21 | 2005-06-14 | Stephen Yuen | Etching a substrate in a process zone |
| US6656282B2 (en) | 2001-10-11 | 2003-12-02 | Moohan Co., Ltd. | Atomic layer deposition apparatus and process using remote plasma |
| US6750150B2 (en) | 2001-10-18 | 2004-06-15 | Macronix International Co., Ltd. | Method for reducing dimensions between patterns on a photoresist |
| KR100400230B1 (ko) * | 2001-11-26 | 2003-10-01 | 삼성전자주식회사 | 점착방지막을 갖는 초소형 기계 구조체 및 그 제조 방법 |
| KR100448714B1 (ko) | 2002-04-24 | 2004-09-13 | 삼성전자주식회사 | 다층 나노라미네이트 구조를 갖는 반도체 장치의 절연막및 그의 형성방법 |
| US7105442B2 (en) * | 2002-05-22 | 2006-09-12 | Applied Materials, Inc. | Ashable layers for reducing critical dimensions of integrated circuit features |
| US20030235998A1 (en) * | 2002-06-24 | 2003-12-25 | Ming-Chung Liang | Method for eliminating standing waves in a photoresist profile |
| US7035696B1 (en) * | 2002-07-03 | 2006-04-25 | Ahsoon Technologies, Inc. | Method and apparatus for poly gate CD control |
| US20040010769A1 (en) * | 2002-07-12 | 2004-01-15 | Macronix International Co., Ltd. | Method for reducing a pitch of a procedure |
| CN1226455C (zh) | 2002-07-19 | 2005-11-09 | 联华电子股份有限公司 | 预清除用氟化碳反应气体的蚀刻工艺后残留聚合物的方法 |
| US7169695B2 (en) * | 2002-10-11 | 2007-01-30 | Lam Research Corporation | Method for forming a dual damascene structure |
| US7090967B2 (en) * | 2002-12-30 | 2006-08-15 | Infineon Technologies Ag | Pattern transfer in device fabrication |
| US6780708B1 (en) | 2003-03-05 | 2004-08-24 | Advanced Micro Devices, Inc. | Method of forming core and periphery gates including two critical masking steps to form a hard mask in a core region that includes a critical dimension less than achievable at a resolution limit of lithography |
| US6829056B1 (en) * | 2003-08-21 | 2004-12-07 | Michael Barnes | Monitoring dimensions of features at different locations in the processing of substrates |
| US7250371B2 (en) * | 2003-08-26 | 2007-07-31 | Lam Research Corporation | Reduction of feature critical dimensions |
| JP2005116690A (ja) * | 2003-10-06 | 2005-04-28 | Toshiba Corp | 半導体装置の製造方法 |
| KR100549204B1 (ko) * | 2003-10-14 | 2006-02-02 | 주식회사 리드시스템 | 실리콘 이방성 식각 방법 |
| US7012027B2 (en) | 2004-01-27 | 2006-03-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Zirconium oxide and hafnium oxide etching using halogen containing chemicals |
| US6864184B1 (en) * | 2004-02-05 | 2005-03-08 | Advanced Micro Devices, Inc. | Method for reducing critical dimension attainable via the use of an organic conforming layer |
| JP4550507B2 (ja) * | 2004-07-26 | 2010-09-22 | 株式会社日立ハイテクノロジーズ | プラズマ処理装置 |
| US20060032833A1 (en) * | 2004-08-10 | 2006-02-16 | Applied Materials, Inc. | Encapsulation of post-etch halogenic residue |
| US7723235B2 (en) * | 2004-09-17 | 2010-05-25 | Renesas Technology Corp. | Method for smoothing a resist pattern prior to etching a layer using the resist pattern |
| US7053003B2 (en) * | 2004-10-27 | 2006-05-30 | Lam Research Corporation | Photoresist conditioning with hydrogen ramping |
| US7282441B2 (en) * | 2004-11-10 | 2007-10-16 | International Business Machines Corporation | De-fluorination after via etch to preserve passivation |
| US20060134917A1 (en) | 2004-12-16 | 2006-06-22 | Lam Research Corporation | Reduction of etch mask feature critical dimensions |
| US7271107B2 (en) * | 2005-02-03 | 2007-09-18 | Lam Research Corporation | Reduction of feature critical dimensions using multiple masks |
| US20070026682A1 (en) * | 2005-02-10 | 2007-02-01 | Hochberg Michael J | Method for advanced time-multiplexed etching |
| US7241683B2 (en) * | 2005-03-08 | 2007-07-10 | Lam Research Corporation | Stabilized photoresist structure for etching process |
| US7491647B2 (en) * | 2005-03-08 | 2009-02-17 | Lam Research Corporation | Etch with striation control |
| US7049209B1 (en) * | 2005-04-01 | 2006-05-23 | International Business Machines Corporation | De-fluorination of wafer surface and related structure |
| KR100810303B1 (ko) * | 2005-04-28 | 2008-03-06 | 삼성전자주식회사 | 휴대단말기의 데이터 표시 및 전송방법 |
| US7695632B2 (en) | 2005-05-31 | 2010-04-13 | Lam Research Corporation | Critical dimension reduction and roughness control |
| US7273815B2 (en) * | 2005-08-18 | 2007-09-25 | Lam Research Corporation | Etch features with reduced line edge roughness |
-
2006
- 2006-10-10 US US11/545,903 patent/US7309646B1/en active Active
-
2007
- 2007-10-04 KR KR1020097009454A patent/KR101411797B1/ko not_active Expired - Fee Related
- 2007-10-04 CN CN2007800379726A patent/CN101523567B/zh active Active
- 2007-10-04 WO PCT/US2007/080455 patent/WO2008045764A1/en not_active Ceased
- 2007-10-04 EP EP07843846A patent/EP2074648B1/de not_active Not-in-force
- 2007-10-04 JP JP2009532507A patent/JP5081917B2/ja not_active Expired - Fee Related
- 2007-10-04 AT AT07843846T patent/ATE540425T1/de active
- 2007-10-08 TW TW096137696A patent/TWI420594B/zh not_active IP Right Cessation
- 2007-11-01 US US11/934,023 patent/US8172948B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR20090091292A (ko) | 2009-08-27 |
| TW200836260A (en) | 2008-09-01 |
| CN101523567A (zh) | 2009-09-02 |
| US20080083502A1 (en) | 2008-04-10 |
| US8172948B2 (en) | 2012-05-08 |
| EP2074648A4 (de) | 2011-05-18 |
| WO2008045764A1 (en) | 2008-04-17 |
| EP2074648A1 (de) | 2009-07-01 |
| KR101411797B1 (ko) | 2014-06-24 |
| EP2074648B1 (de) | 2012-01-04 |
| JP2010506428A (ja) | 2010-02-25 |
| TWI420594B (zh) | 2013-12-21 |
| US7309646B1 (en) | 2007-12-18 |
| JP5081917B2 (ja) | 2012-11-28 |
| CN101523567B (zh) | 2013-07-10 |
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