ATE542298T1 - Verfahren zum kalibrieren eines takts unter verwendung mehrerer taktperioden mit einem einzigen zähler und diesbezügliche einrichtungen und verfahren - Google Patents

Verfahren zum kalibrieren eines takts unter verwendung mehrerer taktperioden mit einem einzigen zähler und diesbezügliche einrichtungen und verfahren

Info

Publication number
ATE542298T1
ATE542298T1 AT08874536T AT08874536T ATE542298T1 AT E542298 T1 ATE542298 T1 AT E542298T1 AT 08874536 T AT08874536 T AT 08874536T AT 08874536 T AT08874536 T AT 08874536T AT E542298 T1 ATE542298 T1 AT E542298T1
Authority
AT
Austria
Prior art keywords
clock signal
clock
periods
calibration
edges
Prior art date
Application number
AT08874536T
Other languages
English (en)
Inventor
Jacobus Cornelis Haartsen
Aalbert Stek
Original Assignee
Sony Ericsson Mobile Comm Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Ericsson Mobile Comm Ab filed Critical Sony Ericsson Mobile Comm Ab
Application granted granted Critical
Publication of ATE542298T1 publication Critical patent/ATE542298T1/de

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00Stabilisation of generator output against variations of physical values, e.g. power supply
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W52/00Power management, e.g. Transmission Power Control [TPC] or power classes
    • H04W52/02Power saving arrangements
    • H04W52/0209Power saving arrangements in terminal devices
    • H04W52/0261Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level
    • H04W52/0287Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level changing the clock frequency of a controller in the equipment
    • H04W52/029Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level changing the clock frequency of a controller in the equipment reducing the clock frequency of the controller
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Electric Clocks (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
AT08874536T 2008-05-27 2008-11-28 Verfahren zum kalibrieren eines takts unter verwendung mehrerer taktperioden mit einem einzigen zähler und diesbezügliche einrichtungen und verfahren ATE542298T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/127,336 US7881895B2 (en) 2008-05-27 2008-05-27 Methods of calibrating a clock using multiple clock periods with a single counter and related devices and methods
PCT/IB2008/055001 WO2009147474A2 (en) 2008-05-27 2008-11-28 Methods of calibrating a clock using multiple clock periods with a single counter and related devices and methods

Publications (1)

Publication Number Publication Date
ATE542298T1 true ATE542298T1 (de) 2012-02-15

Family

ID=40429988

Family Applications (1)

Application Number Title Priority Date Filing Date
AT08874536T ATE542298T1 (de) 2008-05-27 2008-11-28 Verfahren zum kalibrieren eines takts unter verwendung mehrerer taktperioden mit einem einzigen zähler und diesbezügliche einrichtungen und verfahren

Country Status (7)

Country Link
US (2) US7881895B2 (de)
EP (1) EP2283574B1 (de)
KR (1) KR20110020277A (de)
CN (1) CN102047561B (de)
AT (1) ATE542298T1 (de)
TW (1) TW201001910A (de)
WO (1) WO2009147474A2 (de)

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JP5799797B2 (ja) * 2011-12-21 2015-10-28 富士通株式会社 算出方法、算出プログラム及びコンピュータ
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KR101939379B1 (ko) * 2017-05-24 2019-01-16 (주)에프씨아이 저 전력 모드를 구비한 무선통신 장치 및 방법
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FR3116679B1 (fr) 2020-11-20 2023-12-29 Stmicroelectronics Grand Ouest Sas Gestion d'un mode basse consommation
KR20230094575A (ko) * 2021-12-21 2023-06-28 주식회사 엘엑스세미콘 주파수 발생기 및 주파수 발생기의 주파수 보정 방법
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CN115951394A (zh) * 2022-12-30 2023-04-11 合肥锐世数字科技有限公司 时间校正方法、装置、电子设备及计算机可读存储介质
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Also Published As

Publication number Publication date
CN102047561A (zh) 2011-05-04
WO2009147474A2 (en) 2009-12-10
TW201001910A (en) 2010-01-01
US20090296531A1 (en) 2009-12-03
US7881895B2 (en) 2011-02-01
WO2009147474A3 (en) 2010-01-28
EP2283574B1 (de) 2012-01-18
US8219345B2 (en) 2012-07-10
CN102047561B (zh) 2013-05-15
US20110087449A1 (en) 2011-04-14
EP2283574A2 (de) 2011-02-16
KR20110020277A (ko) 2011-03-02

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