ATE542335T1 - Verfahren und einrichtung zur erhaltung der reihenfolgenintegrität von paketen in einem parellel arbeitenden vermittler - Google Patents
Verfahren und einrichtung zur erhaltung der reihenfolgenintegrität von paketen in einem parellel arbeitenden vermittlerInfo
- Publication number
- ATE542335T1 ATE542335T1 AT00110566T AT00110566T ATE542335T1 AT E542335 T1 ATE542335 T1 AT E542335T1 AT 00110566 T AT00110566 T AT 00110566T AT 00110566 T AT00110566 T AT 00110566T AT E542335 T1 ATE542335 T1 AT E542335T1
- Authority
- AT
- Austria
- Prior art keywords
- packet
- packets
- integrity
- parellel
- broker
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/15—Interconnection of switching modules
- H04L49/1515—Non-blocking multistage, e.g. Clos
- H04L49/153—ATM switching fabrics having parallel switch planes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5638—Services, e.g. multimedia, GOS, QOS
- H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
- H04L2012/565—Sequence integrity
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
- H04L49/102—Packet switching elements characterised by the switching fabric construction using shared medium, e.g. bus or ring
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3009—Header conversion, routing tables or routing tags
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/314,261 US6721309B1 (en) | 1999-05-18 | 1999-05-18 | Method and apparatus for maintaining packet order integrity in parallel switching engine |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE542335T1 true ATE542335T1 (de) | 2012-02-15 |
Family
ID=23219247
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT00110566T ATE542335T1 (de) | 1999-05-18 | 2000-05-18 | Verfahren und einrichtung zur erhaltung der reihenfolgenintegrität von paketen in einem parellel arbeitenden vermittler |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6721309B1 (de) |
| EP (1) | EP1061695B1 (de) |
| JP (1) | JP3394504B2 (de) |
| AT (1) | ATE542335T1 (de) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10011667C2 (de) * | 2000-03-10 | 2002-11-21 | Infineon Technologies Ag | Hochgeschwindigkeits-Router |
| AU2002257444A1 (en) * | 2001-05-17 | 2002-11-25 | Solidum Systems Corporation | Distributed packet processing system with internal load distribution |
| US7088719B2 (en) | 2001-12-21 | 2006-08-08 | Agere Systems Inc. | Processor with packet processing order maintenance based on packet flow identifiers |
| FR2858895B1 (fr) | 2003-08-13 | 2006-05-05 | Arteris | Procede et dispositif de gestion de priorite lors de la transmission d'un message |
| FR2862457B1 (fr) * | 2003-11-13 | 2006-02-24 | Arteris | Systeme et procede de transmission d'une sequence de messages dans un reseau d'interconnexions. |
| FR2867338B1 (fr) | 2004-03-02 | 2007-08-10 | Arteris | Procede et dispositif de commutation entre des agents |
| FR2890766B1 (fr) * | 2005-09-12 | 2007-11-30 | Arteris Sa | Systeme et procede de communication asynchrone sur circuit, entre des sous-circuits synchrones |
| FR2899413B1 (fr) * | 2006-03-31 | 2008-08-08 | Arteris Sa | Systeme de commutation de message |
| FR2900017B1 (fr) * | 2006-04-12 | 2008-10-31 | Arteris Sa | Systeme d'interconnexions de blocs fonctionnels externes sur puce muni d'un unique protocole parametrable de communication |
| FR2901437B1 (fr) * | 2006-05-16 | 2008-08-08 | Arteris Sa | Procede de realisation d'un circuit de synchronisation de donnees echangees de maniere asynchrone entre deux blocs synchrones, et circuit de synchronisation elabore a partir d'un tel procede |
| FR2902957B1 (fr) * | 2006-06-23 | 2008-09-12 | Arteris Sa | Systeme et procede de gestions de messages transmis dans un reseau d'interconnexions |
| FR2904445B1 (fr) * | 2006-07-26 | 2008-10-10 | Arteris Sa | Systeme de gestion de messages transmis dans un reseau d'interconnexions sur puce |
| JP5812533B2 (ja) | 2012-05-31 | 2015-11-17 | 株式会社日立製作所 | 通信装置、及び、通信方法 |
| US9286118B2 (en) * | 2012-06-15 | 2016-03-15 | Freescale Semiconductor, Inc. | System and method for improved job processing to reduce contention for shared resources |
| US9104478B2 (en) | 2012-06-15 | 2015-08-11 | Freescale Semiconductor, Inc. | System and method for improved job processing of a number of jobs belonging to communication streams within a data processor |
| US8842675B2 (en) | 2012-08-23 | 2014-09-23 | L-3 Communications Corporation | Systems and methods for multicore processing of data with in-sequence delivery |
| US9632977B2 (en) | 2013-03-13 | 2017-04-25 | Nxp Usa, Inc. | System and method for ordering packet transfers in a data processor |
| US9372723B2 (en) | 2014-04-01 | 2016-06-21 | Freescale Semiconductor, Inc. | System and method for conditional task switching during ordering scope transitions |
| US9372724B2 (en) | 2014-04-01 | 2016-06-21 | Freescale Semiconductor, Inc. | System and method for conditional task switching during ordering scope transitions |
| US9733981B2 (en) | 2014-06-10 | 2017-08-15 | Nxp Usa, Inc. | System and method for conditional task switching during ordering scope transitions |
| US11169845B2 (en) * | 2017-12-21 | 2021-11-09 | Ciena Corporation | Flow and application based processor scheduling for network functions virtualization applications using flow identification based on logical calculations on frame based fields |
| EP4363989A1 (de) * | 2021-06-28 | 2024-05-08 | Synthara AG | Beschleuniger für neuronales netzwerk |
| CN116991862B (zh) * | 2023-08-22 | 2026-03-13 | 北京奇艺世纪科技有限公司 | 跨引擎切换评估方法、装置、存储介质及电子设备 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4598400A (en) * | 1983-05-31 | 1986-07-01 | Thinking Machines Corporation | Method and apparatus for routing message packets |
| BE905982A (fr) | 1986-12-19 | 1987-06-19 | Electronique Et Telecomm Bell | Reseau de commutation de paquets. |
| US4899335A (en) * | 1988-12-21 | 1990-02-06 | American Telephone And Telegraph Company, At&T Bell Laboratories | Self routing packet switching network architecture |
| US5127001A (en) * | 1990-06-22 | 1992-06-30 | Unisys Corporation | Conference call arrangement for distributed network |
| US5889764A (en) * | 1995-08-31 | 1999-03-30 | Intel Corporation | Low-latency multi-party audio chat |
| US5793747A (en) * | 1996-03-14 | 1998-08-11 | Motorola, Inc. | Event-driven cell scheduler and method for supporting multiple service categories in a communication network |
| US6092115A (en) * | 1997-02-07 | 2000-07-18 | Lucent Technologies Inc. | Method for supporting per-connection queuing for feedback-controlled traffic |
| US6452933B1 (en) * | 1997-02-07 | 2002-09-17 | Lucent Technologies Inc. | Fair queuing system with adaptive bandwidth redistribution |
| US5864540A (en) * | 1997-04-04 | 1999-01-26 | At&T Corp/Csi Zeinet(A Cabletron Co.) | Method for integrated traffic shaping in a packet-switched network |
| KR100233091B1 (ko) * | 1997-10-23 | 1999-12-01 | 윤종용 | 에이티엠 트래픽 제어장치 및 방법 |
-
1999
- 1999-05-18 US US09/314,261 patent/US6721309B1/en not_active Expired - Lifetime
-
2000
- 2000-05-16 JP JP2000142912A patent/JP3394504B2/ja not_active Expired - Fee Related
- 2000-05-18 AT AT00110566T patent/ATE542335T1/de active
- 2000-05-18 EP EP00110566A patent/EP1061695B1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP3394504B2 (ja) | 2003-04-07 |
| EP1061695A3 (de) | 2004-05-19 |
| JP2000358066A (ja) | 2000-12-26 |
| EP1061695B1 (de) | 2012-01-18 |
| US6721309B1 (en) | 2004-04-13 |
| EP1061695A2 (de) | 2000-12-20 |
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