ATE543205T1 - METHOD AND APPARATUS FOR PRODUCING THIN EPITACTIC SEMICONDUCTOR LAYERS - Google Patents

METHOD AND APPARATUS FOR PRODUCING THIN EPITACTIC SEMICONDUCTOR LAYERS

Info

Publication number
ATE543205T1
ATE543205T1 AT02779254T AT02779254T ATE543205T1 AT E543205 T1 ATE543205 T1 AT E543205T1 AT 02779254 T AT02779254 T AT 02779254T AT 02779254 T AT02779254 T AT 02779254T AT E543205 T1 ATE543205 T1 AT E543205T1
Authority
AT
Austria
Prior art keywords
deposition
semiconductor layers
semiconductor layer
substrates
thin
Prior art date
Application number
AT02779254T
Other languages
German (de)
Inventor
Bernd Tillack
Dirk Wolansky
Georg Ritter
Thomas Grabolla
Original Assignee
Ihp Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ihp Gmbh filed Critical Ihp Gmbh
Priority claimed from PCT/EP2002/008296 external-priority patent/WO2003012840A2/en
Application granted granted Critical
Publication of ATE543205T1 publication Critical patent/ATE543205T1/en

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C23C16/0209—Pretreatment of the material to be coated by heating
    • C23C16/0218—Pretreatment of the material to be coated by heating in a reactive atmosphere
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/54—Apparatus specially adapted for continuous coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3408—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/36—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done before the formation of the materials
    • H10P14/3602—In-situ cleaning

Landscapes

  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

Production of thin, preferably diffusion-limiting epitaxial semiconductor layers based on SiGeC or SiG comprises simultaneously treating a number of substrates, preferably more than 75, having a diameter of at least 150 mm in a low pressure batch reactor; cleaning the surfaces to be coated by wet chemical method and/or in the gas phase; heating the cleaned substrates to a pre-bake temperature and subjecting the hydrogen pre-bake at the same or higher reactor pressure; heating the substrates to a deposition temperature and depositing the semiconductor layers at the same or lower reactor pressure. The deposition is controlled by surface reactions on the substrate and deposition of the semiconductor layer is controlled in such a way that the deposition of the thin epitaxial semiconductor layer terminates when the thin epitaxial semiconductor layer has reached a thickness of 10-1000 nm. An Independent claim is also included for a device for carrying out the process comprising a main chamber (1) containing a low pressure batch reactor (2), a transfer chamber (3) arranged on the main chamber, and a door (4) fitted to the transfer chamber.
AT02779254T 2001-07-27 2002-07-25 METHOD AND APPARATUS FOR PRODUCING THIN EPITACTIC SEMICONDUCTOR LAYERS ATE543205T1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10137441 2001-07-27
DE10144431A DE10144431A1 (en) 2001-07-27 2001-09-06 Production of thin, preferably diffusion-limiting epitaxial semiconductor layers used in the production of high frequency components comprises simultaneously treating substrates in a low pressure batch reactor before further processing
PCT/EP2002/008296 WO2003012840A2 (en) 2001-07-27 2002-07-25 Method and device for the production of thin epiatctic semiconductor layers

Publications (1)

Publication Number Publication Date
ATE543205T1 true ATE543205T1 (en) 2012-02-15

Family

ID=7693828

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02779254T ATE543205T1 (en) 2001-07-27 2002-07-25 METHOD AND APPARATUS FOR PRODUCING THIN EPITACTIC SEMICONDUCTOR LAYERS

Country Status (2)

Country Link
AT (1) ATE543205T1 (en)
DE (1) DE10144431A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004024207B4 (en) * 2004-05-10 2016-03-24 Ihp Gmbh - Innovations For High Performance Microelectronics / Leibniz-Institut Für Innovative Mikroelektronik A method and apparatus for low temperature epitaxy on a variety of semiconductor substrates

Also Published As

Publication number Publication date
DE10144431A1 (en) 2003-02-13

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