ATE550843T1 - System und verfahren zur adaptiven datenwiedergewinnung - Google Patents

System und verfahren zur adaptiven datenwiedergewinnung

Info

Publication number
ATE550843T1
ATE550843T1 AT99943914T AT99943914T ATE550843T1 AT E550843 T1 ATE550843 T1 AT E550843T1 AT 99943914 T AT99943914 T AT 99943914T AT 99943914 T AT99943914 T AT 99943914T AT E550843 T1 ATE550843 T1 AT E550843T1
Authority
AT
Austria
Prior art keywords
recovery unit
data recovery
data
channel
sampling
Prior art date
Application number
AT99943914T
Other languages
English (en)
Inventor
Gary Mccormack
Ronald Talaga
Ian Kyles
Angus Mccamant
Original Assignee
Vitesse Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vitesse Semiconductor Corp filed Critical Vitesse Semiconductor Corp
Application granted granted Critical
Publication of ATE550843T1 publication Critical patent/ATE550843T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset
    • H04L25/063—Setting decision thresholds using feedback techniques only
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/0033—Correction by delay
    • H04L7/0037—Delay of clock signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Measuring Volume Flow (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Dc Digital Transmission (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AT99943914T 1998-08-25 1999-08-25 System und verfahren zur adaptiven datenwiedergewinnung ATE550843T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/139,252 US6178213B1 (en) 1998-08-25 1998-08-25 Adaptive data recovery system and methods
PCT/US1999/019414 WO2000011830A2 (en) 1998-08-25 1999-08-25 Adaptive data recovery system and methods

Publications (1)

Publication Number Publication Date
ATE550843T1 true ATE550843T1 (de) 2012-04-15

Family

ID=22485779

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99943914T ATE550843T1 (de) 1998-08-25 1999-08-25 System und verfahren zur adaptiven datenwiedergewinnung

Country Status (5)

Country Link
US (1) US6178213B1 (de)
EP (1) EP1023793B1 (de)
JP (1) JP2002523971A (de)
AT (1) ATE550843T1 (de)
WO (1) WO2000011830A2 (de)

Families Citing this family (74)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6463109B1 (en) * 1998-08-25 2002-10-08 Vitesse Semiconductor Corporation Multiple channel adaptive data recovery system
US6580692B1 (en) * 1998-09-18 2003-06-17 The United States Of America As Represented By The Secretary Of The Navy Dynamic switch path verification system within a multi-interface point-to-point switching system (MIPPSS)
JP2000165323A (ja) * 1998-11-30 2000-06-16 Nec Corp 光出力断検出回路
US6765954B1 (en) * 1999-08-16 2004-07-20 Globespanvirata, Inc. System and method for implementing a delta-sigma modulator integrity supervisor
US6188737B1 (en) * 1999-11-24 2001-02-13 Nortel Networks Limited Method and apparatus for regenerating data
US7227918B2 (en) * 2000-03-14 2007-06-05 Altera Corporation Clock data recovery circuitry associated with programmable logic device circuitry
US7333570B2 (en) 2000-03-14 2008-02-19 Altera Corporation Clock data recovery circuitry associated with programmable logic device circuitry
US6519722B1 (en) * 2000-03-22 2003-02-11 Nortel Networks Limited Method and apparatus for controlling the read clock signal rate of a first-in first-out (FIFO) data memory
US6996123B1 (en) * 2000-04-11 2006-02-07 Terawave Communications, Inc. Adaptive bit rate transponder
JP2002189456A (ja) * 2000-12-20 2002-07-05 Fujitsu Ltd 液晶表示装置
US7136441B2 (en) * 2001-01-24 2006-11-14 Matsushita Electric Industrial Co., Ltd. Clock recovery circuit
US7095816B2 (en) * 2001-03-07 2006-08-22 Nippon Telegraph And Telephone Corporation Clock/data recovery circuit
US20020126784A1 (en) * 2001-03-07 2002-09-12 Alain Brazeau Adaptive optical line rate clock and data recovery
EP1241483B1 (de) * 2001-03-16 2004-05-19 Agilent Technologies, Inc. (a Delaware corporation) Bitfehlerratenmessung
US6965737B1 (en) * 2001-06-21 2005-11-15 Lighthouse Capital Partners Iv, Lp System and method for transporting data
US6856206B1 (en) * 2001-06-25 2005-02-15 Silicon Laboratories, Inc. Method and apparatus for acquiring a frequency without a reference clock
US6988227B1 (en) 2001-06-25 2006-01-17 Silicon Laboratories Inc. Method and apparatus for bit error rate detection
US7006536B1 (en) * 2001-07-12 2006-02-28 Lighthouse Capital Partners Iv, Lp System and method for transporting multiple low-bit-rate signals over a single high-bit-rate medium
US6885828B1 (en) * 2001-07-27 2005-04-26 Ciena Corporation Optical signal receiver and method with decision threshold adjustment based on a total percentage error indicator field of the invention
KR100445910B1 (ko) * 2001-12-27 2004-08-25 한국전자통신연구원 광신호 세기의 변동에 관계없이 최적의 수신 성능을 갖는광신호 수신장치 및 그 방법
US6990162B2 (en) * 2002-01-07 2006-01-24 Vitesse Semiconductor Corporation Scalable clock distribution for multiple CRU on the same chip
DE60219277T2 (de) * 2002-01-28 2008-01-03 Lucent Technologies Inc. Einstellung von Entscheidungspegeln und Abtastphase auf der Basis von vorherigen Bit-Werten
DE10203596C1 (de) 2002-01-30 2003-08-14 Infineon Technologies Ag Verfahren zur Abtastphasenregelung
US7729453B1 (en) 2002-04-26 2010-06-01 Bing Li System and method for fast dynamic adjustment of slicing level for burst mode optical receivers
US7321617B2 (en) * 2002-07-09 2008-01-22 International Business Machines Corporation Data communication system with self-test feature
US8861667B1 (en) 2002-07-12 2014-10-14 Rambus Inc. Clock data recovery circuit with equalizer clock calibration
US7292629B2 (en) 2002-07-12 2007-11-06 Rambus Inc. Selectable-tap equalizer
US6871304B2 (en) * 2002-08-12 2005-03-22 Nortel Networks Limited Method and apparatus for adjusting receiver voltage threshold and phase sampling point using FEC counts
KR100467323B1 (ko) * 2002-09-23 2005-01-24 한국전자통신연구원 광 수신기 출력 신호의 판별 수준 최적화 방법 및 장치
US7072431B2 (en) * 2002-10-30 2006-07-04 Visteon Global Technologies, Inc. Clock timing recovery using arbitrary sampling frequency
KR100462407B1 (ko) * 2002-11-07 2004-12-17 한국전자통신연구원 순방향 오류 정정(ｆｅｃ)을 이용한 광수신기의 출력최적화 방법 및 이를 이용한 광수신 시스템
EP1626547B1 (de) * 2003-04-09 2009-10-28 Rambus, Inc. Partialantwortempfänger
US7092472B2 (en) 2003-09-16 2006-08-15 Rambus Inc. Data-level clock recovery
US7397848B2 (en) 2003-04-09 2008-07-08 Rambus Inc. Partial response receiver
US7126378B2 (en) 2003-12-17 2006-10-24 Rambus, Inc. High speed signaling system with adaptive transmit pre-emphasis
US7590175B2 (en) * 2003-05-20 2009-09-15 Rambus Inc. DFE margin test methods and circuits that decouple sample and feedback timing
US7627029B2 (en) 2003-05-20 2009-12-01 Rambus Inc. Margin test methods and circuits
US7406100B2 (en) * 2003-05-21 2008-07-29 Atmel Corporation Bi-directional single wire interface
US7269347B1 (en) * 2003-05-28 2007-09-11 Ciena Corporation Optical receiver decision threshold tuning apparatus and method
JP3712401B2 (ja) * 2003-06-16 2005-11-02 沖電気工業株式会社 光受信装置
US7751726B1 (en) 2003-06-24 2010-07-06 Cisco Technology, Inc. Automatic selection of the performance monitoring based on client type
US7049869B2 (en) * 2003-09-02 2006-05-23 Gennum Corporation Adaptive lock position circuit
US7233164B2 (en) 2003-12-17 2007-06-19 Rambus Inc. Offset cancellation in a multi-level signaling system
KR100535311B1 (ko) * 2003-12-18 2005-12-09 한국전자통신연구원 광 수신기의 문턱전압 제어 장치
US7042252B2 (en) * 2004-04-23 2006-05-09 Brian Jeffrey Galloway Correcting for DC offset in a phase locked loop
US7643576B2 (en) * 2004-05-18 2010-01-05 Avago Technologies General Ip (Singapore) Pte. Ltd. Data-signal-recovery circuit, data-signal-characterizing circuit, and related integrated circuits, systems, and methods
US7574146B2 (en) * 2004-07-09 2009-08-11 Infinera Corporation Pattern-dependent error counts for use in correcting operational parameters in an optical receiver
US8270501B2 (en) * 2004-08-18 2012-09-18 Rambus Inc. Clocking architectures in high-speed signaling systems
US7281176B2 (en) * 2004-10-29 2007-10-09 Silicon Laboratories Inc. Determining signal quality and selecting a slice level via a forbidden zone
US7577224B2 (en) * 2004-12-28 2009-08-18 Silicon Laboratories Inc. Reducing phase offsets in a phase detector
US7609798B2 (en) 2004-12-29 2009-10-27 Silicon Laboratories Inc. Calibrating a phase detector and analog-to-digital converter offset and gain
US7512203B2 (en) * 2005-03-30 2009-03-31 Silicon Laboratories Inc. Data cleaning with an asynchronous reference clock
US7259628B2 (en) 2005-06-30 2007-08-21 Silicon Laboratories Inc. Signal dependent biasing scheme for an amplifier
US7375591B2 (en) * 2006-08-04 2008-05-20 Silicon Laboratories Inc. Robust false locking prevention in referenceless frequency acquisition
JP4557947B2 (ja) 2006-10-11 2010-10-06 ザインエレクトロニクス株式会社 クロックデータ復元装置
US7721134B2 (en) * 2006-12-04 2010-05-18 International Business Machines Corporation Method for on-chip diagnostic testing and checking of receiver margins
EP1863214A1 (de) * 2007-01-25 2007-12-05 Agilent Technologies, Inc. Analyse von digitalen Signalen mit Auswertung ausgewählter Signalbits
US8239432B2 (en) * 2007-10-05 2012-08-07 Micron Technology, Inc. Incorporating noise and/or jitter into waveform generation
US8705603B2 (en) * 2008-02-05 2014-04-22 Vitesse Semiconductor Corporation Adaptive data recovery system with input signal equalization
US8111784B1 (en) * 2008-04-11 2012-02-07 Altera Corporation On-chip data signal eye monitoring circuitry and methods
US8135100B2 (en) * 2008-08-20 2012-03-13 International Business Machines Corporation Adaptive clock and equalization control systems and methods for data receivers in communications systems
JP5041070B2 (ja) * 2008-12-11 2012-10-03 富士通株式会社 受信装置、伝送装置及び伝送方法
JP2010183429A (ja) 2009-02-06 2010-08-19 Renesas Electronics Corp クロック抽出回路
US8761207B2 (en) 2009-04-30 2014-06-24 Centurylink Intellectual Property Llc System and method for advanced adaptive pseudowire
US8335950B2 (en) * 2009-08-12 2012-12-18 Tektronix, Inc. Test and measurement instrument with bit-error detection
JP2011061350A (ja) * 2009-09-08 2011-03-24 Renesas Electronics Corp 受信装置及びその受信方法
US8327206B2 (en) * 2009-12-19 2012-12-04 Tektronix, Inc. Blanking primitives masking circuit
US8386857B2 (en) * 2010-04-28 2013-02-26 Tektronix, Inc. Method and apparatus for measuring symbol and bit error rates independent of disparity errors
US8761325B2 (en) * 2010-06-28 2014-06-24 Ben WILLCOCKS Digital receivers
US9189012B2 (en) * 2012-03-29 2015-11-17 Terasquare Co. Ltd. Clock recovery, receiver, and communication system for multiple channels
US8923371B2 (en) 2012-12-28 2014-12-30 Lsi Corporation SerDes data sampling gear shifter
TWI487287B (zh) * 2013-01-11 2015-06-01 Himax Tech Ltd 資料及時脈恢復裝置
JP6402565B2 (ja) 2014-10-02 2018-10-10 富士通株式会社 受信回路及びその制御方法
US10749756B2 (en) * 2016-06-24 2020-08-18 Advanced Micro Devices, Inc. Channel training using a replica lane

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4097697A (en) 1977-06-02 1978-06-27 Northern Telecom Limited Digital signal performance monitor
US4777640A (en) 1986-06-09 1988-10-11 Motorola, Inc. Frequency adaptive phase jitter canceler
US4823360A (en) 1988-02-12 1989-04-18 Northern Telecom Limited Binary data regenerator with adaptive threshold level
US5359630A (en) 1992-08-13 1994-10-25 Digital Equipment Corporation Method and apparatus for realignment of synchronous data
JPH06284159A (ja) * 1993-03-29 1994-10-07 Toshiba Corp ディジタル復調器
US5481563A (en) 1994-03-14 1996-01-02 Network Systems Corporation Jitter measurement using a statistically locked loop
US5598443A (en) 1994-05-23 1997-01-28 At&T Global Information Solutions Company (Aka Ncr Corporation) Method and apparatus for separating data and clock from a digital data stream
US5757857A (en) 1994-07-21 1998-05-26 The Regents Of The University Of California High speed self-adjusting clock recovery circuit with frequency detection
US5696800A (en) 1995-03-22 1997-12-09 Intel Corporation Dual tracking differential manchester decoder and clock recovery circuit
US5719908A (en) 1995-07-19 1998-02-17 Unisys Corporation Digital/analog bit synchronizer
US5796777A (en) * 1996-02-27 1998-08-18 Motorola, Inc. Apparatus and method for digitizing and detecting a received radio frequency signal
US5878088A (en) * 1997-04-10 1999-03-02 Thomson Consumer Electronics, Inc. Digital variable symbol timing recovery system for QAM
US5896391A (en) * 1996-12-19 1999-04-20 Northern Telecom Limited Forward error correction assisted receiver optimization
US5991346A (en) * 1997-04-02 1999-11-23 Uniden San Diego Research And Development Center, Inc. Method for determining the best time to sample an information signal
DE19717643C2 (de) * 1997-04-25 1999-02-25 Siemens Ag Verfahren und Anordnung zur Regelung der Entscheiderschwelle und des Abtastzeitpunktes eines Datenregenerators

Also Published As

Publication number Publication date
WO2000011830A2 (en) 2000-03-02
EP1023793A2 (de) 2000-08-02
EP1023793B1 (de) 2012-03-21
US6178213B1 (en) 2001-01-23
JP2002523971A (ja) 2002-07-30
WO2000011830A3 (en) 2000-06-02
EP1023793A4 (de) 2005-08-03

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