ATE551722T1 - Verkapseltes halbleiterprodukt und verfahren zu seiner herstellung - Google Patents

Verkapseltes halbleiterprodukt und verfahren zu seiner herstellung

Info

Publication number
ATE551722T1
ATE551722T1 AT09769778T AT09769778T ATE551722T1 AT E551722 T1 ATE551722 T1 AT E551722T1 AT 09769778 T AT09769778 T AT 09769778T AT 09769778 T AT09769778 T AT 09769778T AT E551722 T1 ATE551722 T1 AT E551722T1
Authority
AT
Austria
Prior art keywords
protective envelope
electronic structure
semiconductor product
producing
substrate
Prior art date
Application number
AT09769778T
Other languages
English (en)
Inventor
Eric Pieraerts
Jean-Marc Yannou
Stephane Bellenger
Mickael Pommier
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE551722T1 publication Critical patent/ATE551722T1/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/08Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/01Manufacture or treatment
    • H10W74/014Manufacture or treatment using batch processing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/01Manufacture or treatment
    • H10W74/019Manufacture or treatment using temporary auxiliary substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/129Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed forming a chip-scale package [CSP]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/137Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being directly on the semiconductor body
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/141Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being on at least the sidewalls of the semiconductor body
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/9413Dispositions of bond pads on encapsulations

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Engineering & Computer Science (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
AT09769778T 2008-06-26 2009-06-26 Verkapseltes halbleiterprodukt und verfahren zu seiner herstellung ATE551722T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP08290622 2008-06-26
PCT/IB2009/052773 WO2009156970A1 (en) 2008-06-26 2009-06-26 Packaged semiconductor product and method for manufacture thereof

Publications (1)

Publication Number Publication Date
ATE551722T1 true ATE551722T1 (de) 2012-04-15

Family

ID=41016913

Family Applications (1)

Application Number Title Priority Date Filing Date
AT09769778T ATE551722T1 (de) 2008-06-26 2009-06-26 Verkapseltes halbleiterprodukt und verfahren zu seiner herstellung

Country Status (5)

Country Link
US (1) US8963314B2 (de)
EP (1) EP2291858B1 (de)
CN (1) CN102077341B (de)
AT (1) ATE551722T1 (de)
WO (1) WO2009156970A1 (de)

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US8310040B2 (en) 2010-12-08 2012-11-13 General Electric Company Semiconductor device package having high breakdown voltage and low parasitic inductance and method of manufacturing thereof
US8431444B2 (en) * 2011-08-16 2013-04-30 General Electric Company Epoxy encapsulating and lamination adhesive and method of making same
DE102011112659B4 (de) 2011-09-06 2022-01-27 Vishay Semiconductor Gmbh Oberflächenmontierbares elektronisches Bauelement
TWI501363B (zh) * 2014-01-10 2015-09-21 立昌先進科技股份有限公司 一種小型化表面黏著型二極體封裝元件及其製法
US10211172B2 (en) * 2014-03-13 2019-02-19 Maxim Integrated Products, Inc. Wafer-based electronic component packaging
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US20200098698A1 (en) * 2018-09-26 2020-03-26 Intel Corporation Novel wafer level chip scale package (wlcsp), flip-chip chip scale package (fccsp), and fan out shielding concepts
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Also Published As

Publication number Publication date
CN102077341A (zh) 2011-05-25
CN102077341B (zh) 2014-04-23
WO2009156970A1 (en) 2009-12-30
US8963314B2 (en) 2015-02-24
US20110180897A1 (en) 2011-07-28
EP2291858A1 (de) 2011-03-09
EP2291858B1 (de) 2012-03-28

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