ATE84168T1 - Loesbares montierungssystem fuer halbleiter auf einem leitenden substrat. - Google Patents

Loesbares montierungssystem fuer halbleiter auf einem leitenden substrat.

Info

Publication number
ATE84168T1
ATE84168T1 AT87401034T AT87401034T ATE84168T1 AT E84168 T1 ATE84168 T1 AT E84168T1 AT 87401034 T AT87401034 T AT 87401034T AT 87401034 T AT87401034 T AT 87401034T AT E84168 T1 ATE84168 T1 AT E84168T1
Authority
AT
Austria
Prior art keywords
conductor
substrate
semiconductor
resilient
mounting system
Prior art date
Application number
AT87401034T
Other languages
English (en)
Inventor
James C K Lee
Gene M Amdahl
Richard Beck
Chune Lee
Edward Hu
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Application granted granted Critical
Publication of ATE84168T1 publication Critical patent/ATE84168T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/60—Securing means for detachable heating or cooling arrangements, e.g. clamps
    • H10W40/611—Bolts or screws
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W78/00—Detachable holders for supporting packaged chips in operation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/231—Arrangements for cooling characterised by their places of attachment or cooling paths
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/231—Arrangements for cooling characterised by their places of attachment or cooling paths
    • H10W40/233—Arrangements for cooling characterised by their places of attachment or cooling paths attached to chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/231—Arrangements for cooling characterised by their places of attachment or cooling paths
    • H10W40/237—Arrangements for cooling characterised by their places of attachment or cooling paths attached to additional arrangements for cooling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/231—Arrangements for cooling characterised by their places of attachment or cooling paths
    • H10W40/242—Arrangements for cooling characterised by their places of attachment or cooling paths comprising thermal conductors between chips and the and the arrangements for cooling, e.g. compliant heat-spreaders

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)
  • Prostheses (AREA)
  • Projection-Type Copiers In General (AREA)
  • Vehicle Step Arrangements And Article Storage (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Combinations Of Printed Boards (AREA)
  • Electroluminescent Light Sources (AREA)
  • Nitrogen Condensed Heterocyclic Rings (AREA)
  • Drying Of Semiconductors (AREA)
AT87401034T 1986-05-07 1987-05-06 Loesbares montierungssystem fuer halbleiter auf einem leitenden substrat. ATE84168T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US86072586A 1986-05-07 1986-05-07
EP87401034A EP0245179B1 (de) 1986-05-07 1987-05-06 Lösbares Montierungssystem für Halbleiter auf einem leitenden Substrat

Publications (1)

Publication Number Publication Date
ATE84168T1 true ATE84168T1 (de) 1993-01-15

Family

ID=25333883

Family Applications (1)

Application Number Title Priority Date Filing Date
AT87401034T ATE84168T1 (de) 1986-05-07 1987-05-06 Loesbares montierungssystem fuer halbleiter auf einem leitenden substrat.

Country Status (7)

Country Link
EP (1) EP0245179B1 (de)
JP (1) JPS6332958A (de)
AT (1) ATE84168T1 (de)
AU (1) AU598253B2 (de)
DE (1) DE3783266T2 (de)
DK (1) DK231287A (de)
FI (1) FI872004L (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0854506A3 (de) * 1987-03-04 1999-03-31 Canon Kabushiki Kaisha Elektrisches Verbindungsteil und elektrisches Schaltungsteil
US4899208A (en) * 1987-12-17 1990-02-06 International Business Machines Corporation Power distribution for full wafer package
US5637925A (en) * 1988-02-05 1997-06-10 Raychem Ltd Uses of uniaxially electrically conductive articles
EP0391979A1 (de) * 1988-02-05 1990-10-17 Raychem Limited Verwendungen von uniaxial-elektroleitenden anordnungen
EP0329314A1 (de) * 1988-02-05 1989-08-23 Raychem Limited Verwendungen von uniaxial-elektroleitenden Anordnungen
US5631447A (en) * 1988-02-05 1997-05-20 Raychem Limited Uses of uniaxially electrically conductive articles
EP0344702B1 (de) * 1988-05-30 1996-03-13 Canon Kabushiki Kaisha Elektrischer Schaltungsapparat
US5283468A (en) * 1988-05-30 1994-02-01 Canon Kabushiki Kaisha Electric circuit apparatus
US4933808A (en) * 1989-05-11 1990-06-12 Westinghouse Electric Corp. Solderless printed wiring board module and multi-module assembly
US4954878A (en) * 1989-06-29 1990-09-04 Digital Equipment Corp. Method of packaging and powering integrated circuit chips and the chip assembly formed thereby
US5047830A (en) * 1990-05-22 1991-09-10 Amp Incorporated Field emitter array integrated circuit chip interconnection
US5140405A (en) * 1990-08-30 1992-08-18 Micron Technology, Inc. Semiconductor assembly utilizing elastomeric single axis conductive interconnect
US5148266A (en) * 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies having interposer and flexible lead
US7198969B1 (en) 1990-09-24 2007-04-03 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
JP2747113B2 (ja) * 1990-11-28 1998-05-06 北川工業株式会社 導電線内蔵筐体
DE29620595U1 (de) * 1996-11-26 1998-01-02 Siemens AG, 80333 München Sockel für eine integrierte Schaltung
DE19832970A1 (de) * 1998-07-22 1999-11-04 Siemens Ag Integrierte elektronische Schaltung und Verfahren zum Versehen einer integrierten elektronischen Schaltung mit Anschlüssen
DE10147054A1 (de) * 2001-09-25 2003-04-24 Siemens Ag Mehrebenenleiterplatte mit erhöhter freier Verdrahtungsfläche
DE10355921B4 (de) * 2003-11-29 2005-12-22 Festo Ag & Co. Elektrische Schaltungsanordnung mit einem elektronischen Chip in einer Aufnahmevorrichtung des Schaltungsträgers

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1183280A (en) * 1981-02-09 1985-02-26 Francis N. Sinnadurai Integrated circuit chip carrier
JPS57166051A (en) * 1981-04-06 1982-10-13 Mitsubishi Electric Corp Semiconductor device
EP0148820B1 (de) * 1983-07-11 1988-10-12 Silicon Connection, Inc. Chipverbindungsanordnung und methode
US4597617A (en) * 1984-03-19 1986-07-01 Tektronix, Inc. Pressure interconnect package for integrated circuits
US4667219A (en) * 1984-04-27 1987-05-19 Trilogy Computer Development Partners, Ltd. Semiconductor chip interface
GB8412674D0 (en) * 1984-05-18 1984-06-27 British Telecomm Integrated circuit chip carrier
JPS60263447A (ja) * 1984-06-11 1985-12-26 Nec Corp 電子回路パツケ−ジ

Also Published As

Publication number Publication date
FI872004A7 (fi) 1987-11-08
FI872004A0 (fi) 1987-05-06
FI872004L (fi) 1987-11-08
EP0245179B1 (de) 1992-12-30
EP0245179A2 (de) 1987-11-11
DE3783266T2 (de) 1993-07-22
AU598253B2 (en) 1990-06-21
DK231287A (da) 1987-11-08
DK231287D0 (da) 1987-05-06
JPS6332958A (ja) 1988-02-12
EP0245179A3 (en) 1988-10-05
AU7216587A (en) 1987-11-19
DE3783266D1 (de) 1993-02-11

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties