BE844571A - MEMORY RECONFIGURATION DEVICE - Google Patents

MEMORY RECONFIGURATION DEVICE

Info

Publication number
BE844571A
BE844571A BE2055208A BE2055208A BE844571A BE 844571 A BE844571 A BE 844571A BE 2055208 A BE2055208 A BE 2055208A BE 2055208 A BE2055208 A BE 2055208A BE 844571 A BE844571 A BE 844571A
Authority
BE
Belgium
Prior art keywords
reconfiguration device
memory reconfiguration
memory
reconfiguration
Prior art date
Application number
BE2055208A
Other languages
French (fr)
Inventor
M G M Baudhuin
R R C Bonami
L P Castellan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE844571A publication Critical patent/BE844571A/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
BE2055208A 1975-07-28 1976-07-28 MEMORY RECONFIGURATION DEVICE BE844571A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7523418A FR2319953A1 (en) 1975-07-28 1975-07-28 MEMORY RECONFIGURATION DEVICE

Publications (1)

Publication Number Publication Date
BE844571A true BE844571A (en) 1977-01-28

Family

ID=9158412

Family Applications (1)

Application Number Title Priority Date Filing Date
BE2055208A BE844571A (en) 1975-07-28 1976-07-28 MEMORY RECONFIGURATION DEVICE

Country Status (3)

Country Link
BE (1) BE844571A (en)
FR (1) FR2319953A1 (en)
GB (1) GB1536436A (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4130886A (en) * 1976-12-27 1978-12-19 Rca Corporation Circuit for rearranging word bits
DE2823457C2 (en) * 1978-05-30 1982-12-30 Standard Elektrik Lorenz Ag, 7000 Stuttgart Circuit arrangement for error monitoring of a memory of a digital computer system
US4321667A (en) * 1979-10-31 1982-03-23 International Business Machines Corp. Add-on programs with code verification and control
DE3032630C2 (en) * 1980-08-29 1983-12-22 Siemens AG, 1000 Berlin und 8000 München Semiconductor memory from memory modules with redundant memory areas and method for its operation
US4507730A (en) * 1981-10-01 1985-03-26 Honeywell Information Systems Inc. Memory system with automatic memory configuration
EP0259859B1 (en) * 1986-09-10 1992-12-02 Nec Corporation Information processing system capable of reducing invalid memory operations by detecting an error in a main memory
GB8902365D0 (en) * 1989-02-03 1989-03-22 Int Computers Ltd Data processing system

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3312947A (en) * 1963-12-31 1967-04-04 Bell Telephone Labor Inc Plural memory system with internal memory transfer and duplicated information
BE789991A (en) * 1971-10-12 1973-04-12 Siemens Ag LOGIC DEVICE, IN PARTICULAR DECODER WITH REDUNDANT ELEMENTS
FR2217769B1 (en) * 1973-02-09 1984-03-09 Cii Honeywell Bull

Also Published As

Publication number Publication date
FR2319953A1 (en) 1977-02-25
GB1536436A (en) 1978-12-20
FR2319953B1 (en) 1979-08-24

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