BE848461A - Dispositif a acces multiple a une memoire, - Google Patents

Dispositif a acces multiple a une memoire,

Info

Publication number
BE848461A
BE848461A BE2055462A BE2055462A BE848461A BE 848461 A BE848461 A BE 848461A BE 2055462 A BE2055462 A BE 2055462A BE 2055462 A BE2055462 A BE 2055462A BE 848461 A BE848461 A BE 848461A
Authority
BE
Belgium
Prior art keywords
memory
multiple access
access
Prior art date
Application number
BE2055462A
Other languages
English (en)
Inventor
J L R Jamet
M J-P Leger
M A Regnier
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE848461A publication Critical patent/BE848461A/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/524—Deadlock detection or avoidance
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
BE2055462A 1975-11-20 1976-11-18 Dispositif a acces multiple a une memoire, BE848461A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7535466A FR2332571A1 (fr) 1975-11-20 1975-11-20 Dispositif a acces multiple a une memoire

Publications (1)

Publication Number Publication Date
BE848461A true BE848461A (fr) 1977-05-18

Family

ID=9162662

Family Applications (1)

Application Number Title Priority Date Filing Date
BE2055462A BE848461A (fr) 1975-11-20 1976-11-18 Dispositif a acces multiple a une memoire,

Country Status (3)

Country Link
BE (1) BE848461A (fr)
FR (1) FR2332571A1 (fr)
GB (1) GB1564031A (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0012016A1 (fr) * 1978-11-30 1980-06-11 Sperry Corporation Commande d'accès en mémoire
EP0136218A3 (fr) * 1983-08-29 1988-04-20 FAIRCHILD CAMERA & INSTRUMENT CORPORATION Processeur pipeline à portes multiples
GB2309559B (en) * 1996-01-27 2000-01-26 Motorola Israel Ltd Microprocessor and system

Also Published As

Publication number Publication date
FR2332571B1 (fr) 1983-01-07
GB1564031A (en) 1980-04-02
FR2332571A1 (fr) 1977-06-17

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