BR0318492A - rede dependente de chave combinatória para criptografia/decifração de dados digitais de entrada, bloco para ser usado para funções criptográficas controladas por chave secreta, método para criptografia/decifração de dados digitais de entrada, dispositivo de processamento de dados, e, dispositivo de multimìdia para armazenar e reproduzir dados digitais - Google Patents

rede dependente de chave combinatória para criptografia/decifração de dados digitais de entrada, bloco para ser usado para funções criptográficas controladas por chave secreta, método para criptografia/decifração de dados digitais de entrada, dispositivo de processamento de dados, e, dispositivo de multimìdia para armazenar e reproduzir dados digitais

Info

Publication number
BR0318492A
BR0318492A BRPI0318492-7A BR0318492A BR0318492A BR 0318492 A BR0318492 A BR 0318492A BR 0318492 A BR0318492 A BR 0318492A BR 0318492 A BR0318492 A BR 0318492A
Authority
BR
Brazil
Prior art keywords
bits
decryption
encryption
input data
digital input
Prior art date
Application number
BRPI0318492-7A
Other languages
English (en)
Inventor
Jovan Golic
Original Assignee
Telecom Italia Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telecom Italia Spa filed Critical Telecom Italia Spa
Publication of BR0318492A publication Critical patent/BR0318492A/pt

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0631Substitution permutation network [SPN], i.e. cipher composed of a number of stages or rounds each involving linear and nonlinear transformations, e.g. AES algorithms
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0625Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/08Randomization, e.g. dummy operations or using noise
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12Details relating to cryptographic hardware or logic circuitry
    • H04L2209/125Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/24Key scheduling, i.e. generating round keys or sub-keys for block encryption

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)

Abstract

"REDE DEPENDENTE DE CHAVE COMBINATóRIA PARA CRIPTOGRAFIA/DECIFRAçãO DE DADOS DIGITAIS DE ENTRADA, BLOCO PARA SER USADO PARA FUNçõES CRIPTOGRáFICAS CONTROLADAS POR CHAVE SECRETA, MéTODO PARA CRIPTOGRAFIA/DECIFRAçãO DE DADOS DIGITAIS DE ENTRADA, DISPOSITIVO DE PROCESSAMENTO DE DADOS, E, DISPOSITIVO DE MULTIMìDIA PARA ARMAZENAR E REPRODUZIR DADOS DIGITAIS". Uma rede dependente de chave combinatória (46), adequada para a criptografia/decifração de dados em barramentos e em memórias de dispositivos de processamento de dados, inclui várias camadas, onde cada camada é composta de vários blocos de construção elementares (2) operando em tamanhos de bloco muito pequenos. Um bloco de construção genérico (2) atua em um pequeno número de bits de dados de entrada, que são divididos em dois grupos de m e n bits, respectivamente. Os m bits de entrada, que são passados à saída intactos, são usados para selecionar k fora de 2¬ m¬k bits de chave por um circuito de multiplexador; os k bits são então usados para selecionar uma transformação reversível de (nxn) bits (R~ k~) atuando nos n bits de entrada restantes para produzir os n bits de saída correspondentes. O número total dos bits de chave no bloco de construção é assim 2¬ m¬k, que pode facilmente ser feito maior que m+n. Um bloco de construção inverso é o mesmo, exceto que as transformações reversíveis R~ k~ são substituídas por seus inversos R~ k~¬ -1¬.
BRPI0318492-7A 2003-09-05 2003-09-05 rede dependente de chave combinatória para criptografia/decifração de dados digitais de entrada, bloco para ser usado para funções criptográficas controladas por chave secreta, método para criptografia/decifração de dados digitais de entrada, dispositivo de processamento de dados, e, dispositivo de multimìdia para armazenar e reproduzir dados digitais BR0318492A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/IT2003/000532 WO2005025124A1 (en) 2003-09-05 2003-09-05 Secret-key-controlled reversible circuit and corresponding method of data processing

Publications (1)

Publication Number Publication Date
BR0318492A true BR0318492A (pt) 2006-09-12

Family

ID=34259990

Family Applications (2)

Application Number Title Priority Date Filing Date
BRPI0318492 BRPI0318492B1 (pt) 2003-09-05 2003-09-05 rede dependente de chave combinatória e método para criptografia/decifração de dados digitais de entrada
BRPI0318492-7A BR0318492A (pt) 2003-09-05 2003-09-05 rede dependente de chave combinatória para criptografia/decifração de dados digitais de entrada, bloco para ser usado para funções criptográficas controladas por chave secreta, método para criptografia/decifração de dados digitais de entrada, dispositivo de processamento de dados, e, dispositivo de multimìdia para armazenar e reproduzir dados digitais

Family Applications Before (1)

Application Number Title Priority Date Filing Date
BRPI0318492 BRPI0318492B1 (pt) 2003-09-05 2003-09-05 rede dependente de chave combinatória e método para criptografia/decifração de dados digitais de entrada

Country Status (6)

Country Link
US (1) US7913083B2 (pt)
EP (1) EP1661295B1 (pt)
CN (1) CN1826753B (pt)
AU (1) AU2003274687A1 (pt)
BR (2) BRPI0318492B1 (pt)
WO (1) WO2005025124A1 (pt)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4909018B2 (ja) 2006-11-16 2012-04-04 富士通株式会社 共通鍵暗号のための暗号化装置
EP2293487A1 (en) * 2009-09-08 2011-03-09 Thomson Licensing A method of diversification of a round function of an encryption algorithm
JP5488608B2 (ja) * 2009-10-27 2014-05-14 日本電気株式会社 ブロック暗号装置、ブロック暗号化方法およびプログラム
JP5682525B2 (ja) * 2011-03-28 2015-03-11 ソニー株式会社 暗号処理装置、および暗号処理方法、並びにプログラム
EP2602952A1 (en) * 2011-12-07 2013-06-12 Gemalto SA Cryptographic method for protecting a key hardware register against fault attacks
JP5612007B2 (ja) * 2012-03-15 2014-10-22 株式会社東芝 暗号化鍵生成装置
JP2015191106A (ja) * 2014-03-28 2015-11-02 ソニー株式会社 暗号処理装置、および暗号処理方法、並びにプログラム
WO2016012825A1 (en) * 2014-07-24 2016-01-28 Elliptic Technologies Inc. System and method for generating random key stream cipher texts
US9264229B1 (en) 2014-07-24 2016-02-16 Elliptic Technologies Inc. System and method for generating random key stream cipher texts
US9654111B1 (en) * 2014-11-12 2017-05-16 Maxim Integrated Products, Inc. Systems and methods for protecting data using reconfigurable logic paths
US10797722B2 (en) * 2016-06-10 2020-10-06 The Boeing Company System and method for providing hardware based fast and secure expansion and compression functions
US10992468B2 (en) * 2018-03-19 2021-04-27 Arm Limited Key schedule determination

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4195200A (en) * 1976-06-30 1980-03-25 International Business Machines Corporation Key controlled block-cipher cryptographic system employing a multidirectional shift matrix
JP2862030B2 (ja) * 1991-06-13 1999-02-24 三菱電機株式会社 暗号化方式
FR2723223B1 (fr) * 1994-07-29 1996-08-30 Sgs Thomson Microelectronics Procede de brouillage numerique et application a un circuit programmable
US5943421A (en) * 1995-09-11 1999-08-24 Norand Corporation Processor having compression and encryption circuitry
JP3625540B2 (ja) * 1995-09-11 2005-03-02 三洋電機株式会社 スクランブル解除装置
DE19733829C2 (de) * 1997-08-05 2000-02-24 Micronas Semiconductor Holding Verfahren zum Verschlüsseln bzw. Entschlüsseln einer Datenfolge
DE19907964C1 (de) * 1999-02-24 2000-08-10 Fraunhofer Ges Forschung Vorrichtung und Verfahren zum Erzeugen eines verschlüsselten Datenstroms und Vorrichtung und Verfahren zum Erzeugen eines entschlüsselten Audio- und/oder Videosignals
EP1171970A1 (en) * 1999-04-27 2002-01-16 Valentin Alexandrovich Mischenko Method for encrypting information and device for realization of the method
US6804355B1 (en) * 2000-01-06 2004-10-12 Intel Corporation Block cipher for small selectable block sizes
WO2001054083A1 (de) * 2000-01-18 2001-07-26 Infineon Technologies Ag Mikroprozessoranordnung mit verschlüsselung
EP1118941B1 (de) * 2000-01-18 2008-01-02 Infineon Technologies AG Mikroprozessoranordnung und Verfahren zum Betreiben einer Mikroprozessoranordnung
US6931127B2 (en) * 2000-05-31 2005-08-16 Hynix Semiconductor Inc. Encryption device using data encryption standard algorithm
KR100377176B1 (ko) * 2000-06-12 2003-03-26 주식회사 하이닉스반도체 데이터 암호화 표준 알고리즘을 이용한 암호화 장치
US7142671B2 (en) * 2000-12-13 2006-11-28 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US7366300B2 (en) * 2000-12-13 2008-04-29 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
JP2002328845A (ja) * 2001-05-07 2002-11-15 Fujitsu Ltd 半導体集積回路及びicカードのセキュリティー保護方法
JP3851115B2 (ja) * 2001-06-28 2006-11-29 富士通株式会社 暗号回路
US7216285B2 (en) * 2001-11-09 2007-05-08 Marvell International Ltd. System and method for generating cyclic redundancy check
JP3688628B2 (ja) * 2001-11-09 2005-08-31 株式会社東芝 信号処理方法及び装置、信号再生方法及び装置、記録媒体
US20030198345A1 (en) * 2002-04-15 2003-10-23 Van Buer Darrel J. Method and apparatus for high speed implementation of data encryption and decryption utilizing, e.g. Rijndael or its subset AES, or other encryption/decryption algorithms having similar key expansion data flow
US20030231766A1 (en) * 2002-05-30 2003-12-18 Bedros Hanounik Shared control and information bit representing encryption key position selection or new encryption key value
US8005212B2 (en) * 2002-07-10 2011-08-23 Infineon Technologies Ag Device and method for performing a cryptoalgorithm
US7415115B2 (en) * 2003-05-14 2008-08-19 Broadcom Corporation Method and system for disaster recovery of data from a storage device

Also Published As

Publication number Publication date
US7913083B2 (en) 2011-03-22
BRPI0318492B1 (pt) 2019-12-10
AU2003274687A1 (en) 2005-03-29
EP1661295A1 (en) 2006-05-31
CN1826753B (zh) 2010-12-08
WO2005025124A1 (en) 2005-03-17
CN1826753A (zh) 2006-08-30
EP1661295B1 (en) 2013-03-27
US20060236102A1 (en) 2006-10-19

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Legal Events

Date Code Title Description
B07A Application suspended after technical examination (opinion) [chapter 7.1 patent gazette]
B09B Patent application refused [chapter 9.2 patent gazette]
B12B Appeal against refusal [chapter 12.2 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 10 (DEZ) ANOS CONTADOS A PARTIR DE 10/12/2019, OBSERVADAS AS CONDICOES LEGAIS. (CO) 10 (DEZ) ANOS CONTADOS A PARTIR DE 10/12/2019, OBSERVADAS AS CONDICOES LEGAIS

B21F Lapse acc. art. 78, item iv - on non-payment of the annual fees in time

Free format text: REFERENTE A 19A ANUIDADE.

B24J Lapse because of non-payment of annual fees (definitively: art 78 iv lpi, resolution 113/2013 art. 12)

Free format text: EM VIRTUDE DA EXTINCAO PUBLICADA NA RPI 2686 DE 28-06-2022 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDA A EXTINCAO DA PATENTE E SEUS CERTIFICADOS, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.