BR112016012902A2 - Aparelho, método e sistema para um mecanismo de configuração rápida - Google Patents
Aparelho, método e sistema para um mecanismo de configuração rápidaInfo
- Publication number
- BR112016012902A2 BR112016012902A2 BR112016012902A BR112016012902A BR112016012902A2 BR 112016012902 A2 BR112016012902 A2 BR 112016012902A2 BR 112016012902 A BR112016012902 A BR 112016012902A BR 112016012902 A BR112016012902 A BR 112016012902A BR 112016012902 A2 BR112016012902 A2 BR 112016012902A2
- Authority
- BR
- Brazil
- Prior art keywords
- configuration
- host
- context
- quick
- low power
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/445—Program loading or initiating
- G06F9/44505—Configuring for program initiating, e.g. using registry, configuration files
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operations
- G06F11/1402—Saving, restoring, recovering or retrying
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/102—Program control for peripheral devices where the program performs an interfacing function, e.g. device driver
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operations
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
- G06F11/1441—Resetting or repowering
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Quality & Reliability (AREA)
- Information Transfer Systems (AREA)
- Power Sources (AREA)
- Bus Control (AREA)
Abstract
APARELHO, MÉTODO E SISTEMA PARA UM MECANISMO DE CONFIGURAÇÃO RÁPIDA. A presente invenção descreve um aparelho, método e sistema para a configuração rápida de um dispositivo. Os dispositivos de configuração rápida podem ser configurados sem a intervenção do anfitrião. Por exemplo, antes de entrar em um modo de baixa energia, o dispositivo pode despejar seu contexto de configuração em armazenamento e entrar em baixo consumo de energia. Então, ao voltar a um estado ativo, um controlador pode recarregar o contexto, sem que um dispositivo de processamento anfitrião tenha de regravar todo o espaço de configuração, o que potencialmente reduz a decisão de latência de quando um dispositivo entra em um modo de baixa energia. Além disso, o mecanismo de configuração rápida pode acelerar acessos de configuração a partir do anfitrião, fornecendo conclusões aceleradas, e ainda assim, garantir a configuração de legado para dispositivos de legado.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US2014/011899 WO2015108522A1 (en) | 2014-01-16 | 2014-01-16 | An apparatus, method, and system for a fast configuration mechanism |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BR112016012902A2 true BR112016012902A2 (pt) | 2017-08-08 |
Family
ID=53543281
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR112016012902A BR112016012902A2 (pt) | 2014-01-16 | 2014-01-16 | Aparelho, método e sistema para um mecanismo de configuração rápida |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US20160274923A1 (pt) |
| EP (1) | EP3095041A4 (pt) |
| JP (1) | JP6286551B2 (pt) |
| KR (1) | KR101995623B1 (pt) |
| CN (1) | CN105830053A (pt) |
| BR (1) | BR112016012902A2 (pt) |
| DE (1) | DE112014006183B4 (pt) |
| WO (1) | WO2015108522A1 (pt) |
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| US9760513B2 (en) * | 2015-09-22 | 2017-09-12 | Cisco Technology, Inc. | Low latency efficient sharing of resources in multi-server ecosystems |
| US9984021B1 (en) * | 2015-09-28 | 2018-05-29 | Amazon Technologies, Inc. | Location-aware self-configuration of a peripheral device |
| CN105843767A (zh) * | 2016-03-24 | 2016-08-10 | 山东超越数控电子有限公司 | 一种pci总线千兆网络实现方法 |
| JP7163002B2 (ja) * | 2016-05-25 | 2022-10-31 | キヤノン株式会社 | プロセッサに接続されるデバイスから通知される復帰時間に応じてプロセッサの省電力のレベルを決定する情報処理装置及びプロセッサの省電力方法 |
| US9946325B2 (en) * | 2016-06-30 | 2018-04-17 | Intel IP Corporation | Interprocessor power state transitions |
| US10156877B2 (en) | 2016-10-01 | 2018-12-18 | Intel Corporation | Enhanced power management for support of priority system events |
| US10296338B2 (en) * | 2016-12-09 | 2019-05-21 | Intel Corporation | System, apparatus and method for low overhead control transfer to alternate address space in a processor |
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| CN107656895B (zh) * | 2017-10-27 | 2023-07-28 | 上海力诺通信科技有限公司 | 一种1u标准高度的正交平台高密度计算架构 |
| US10761983B2 (en) * | 2017-11-14 | 2020-09-01 | International Business Machines Corporation | Memory based configuration state registers |
| US10592164B2 (en) | 2017-11-14 | 2020-03-17 | International Business Machines Corporation | Portions of configuration state registers in-memory |
| KR102428450B1 (ko) * | 2017-12-21 | 2022-08-01 | 삼성전자주식회사 | 호스트 컨트롤러, 보안 요소 및 직렬 주변기기 인터페이스 통신 시스템 |
| US10545773B2 (en) * | 2018-05-23 | 2020-01-28 | Intel Corporation | System, method, and apparatus for DVSEC for efficient peripheral management |
| KR102555511B1 (ko) * | 2018-11-01 | 2023-07-14 | 에스케이하이닉스 주식회사 | 저장 장치 및 그 동작 방법 |
| US11151075B2 (en) | 2018-12-14 | 2021-10-19 | Ati Technologies Ulc | Data communications with enhanced speed mode |
| CN110297818B (zh) * | 2019-06-26 | 2022-03-01 | 杭州数梦工场科技有限公司 | 构建数据仓库的方法及装置 |
| US12170263B2 (en) * | 2019-09-27 | 2024-12-17 | Advanced Micro Devices, Inc. | Fabricating active-bridge-coupled GPU chiplets |
| CN111176408B (zh) * | 2019-12-06 | 2021-07-16 | 瑞芯微电子股份有限公司 | 一种SoC的低功耗处理方法和装置 |
| KR102838072B1 (ko) * | 2019-12-10 | 2025-07-24 | 삼성전자 주식회사 | 다수 개의 집적 회로 사이의 인터페이스를 제어하기 위한 전자 장치 및 그의 동작 방법 |
| CN111240626A (zh) * | 2020-01-09 | 2020-06-05 | 中瓴智行(成都)科技有限公司 | 一种基于Hypervisor智能座舱操作系统双屏互动的方法和系统 |
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| US11074206B1 (en) * | 2020-09-29 | 2021-07-27 | Arm Limited | Message protocol for a data processing system |
| TWI797554B (zh) * | 2021-02-05 | 2023-04-01 | 新唐科技股份有限公司 | 系統單晶片及控制方法 |
| US20210232504A1 (en) * | 2021-04-09 | 2021-07-29 | Intel Corporation | Avoiding processor stall when accessing coherent memory device in low power |
| TWI888640B (zh) * | 2021-09-09 | 2025-07-01 | 韓商愛思開海力士有限公司 | 用於互連協定的資料處理的方法、控制器以及儲存裝置 |
| CN114327751B (zh) * | 2021-12-09 | 2025-12-30 | 北京航空航天大学 | 一种面向多域隔离通信的虚拟pci设备及其实现方法 |
| CN114003392B (zh) * | 2021-12-28 | 2022-04-22 | 苏州浪潮智能科技有限公司 | 一种数据加速计算方法及相关装置 |
| US12282444B2 (en) | 2022-11-15 | 2025-04-22 | Google Llc | Connecting non-PCIe accelerators as PCIe devices |
| CN115952126B (zh) * | 2023-03-14 | 2023-05-12 | 沐曦集成电路(上海)有限公司 | 一种gpu处理器系统 |
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| KR20250064807A (ko) | 2023-11-03 | 2025-05-12 | 삼성전자주식회사 | 커맨드 처리 장치 및 이를 포함하는 디스플레이 구동 집적 회로 |
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-
2014
- 2014-01-16 DE DE112014006183.2T patent/DE112014006183B4/de active Active
- 2014-01-16 WO PCT/US2014/011899 patent/WO2015108522A1/en not_active Ceased
- 2014-01-16 JP JP2016535113A patent/JP6286551B2/ja active Active
- 2014-01-16 CN CN201480068881.9A patent/CN105830053A/zh active Pending
- 2014-01-16 EP EP14878689.0A patent/EP3095041A4/en not_active Withdrawn
- 2014-01-16 BR BR112016012902A patent/BR112016012902A2/pt not_active Application Discontinuation
- 2014-01-16 KR KR1020167015893A patent/KR101995623B1/ko active Active
- 2014-01-16 US US14/410,468 patent/US20160274923A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| WO2015108522A1 (en) | 2015-07-23 |
| JP6286551B2 (ja) | 2018-02-28 |
| KR101995623B1 (ko) | 2019-07-02 |
| JP2017503245A (ja) | 2017-01-26 |
| DE112014006183T5 (de) | 2016-09-22 |
| US20160274923A1 (en) | 2016-09-22 |
| KR20160085882A (ko) | 2016-07-18 |
| DE112014006183B4 (de) | 2026-01-29 |
| EP3095041A4 (en) | 2018-04-25 |
| CN105830053A (zh) | 2016-08-03 |
| EP3095041A1 (en) | 2016-11-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| B06U | Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette] | ||
| B07A | Application suspended after technical examination (opinion) [chapter 7.1 patent gazette] | ||
| B09B | Patent application refused [chapter 9.2 patent gazette] |