BR7601635A - Processo para formar saliencias ligantes conjugadas,e dispositivo semicondutor - Google Patents

Processo para formar saliencias ligantes conjugadas,e dispositivo semicondutor

Info

Publication number
BR7601635A
BR7601635A BR7601635A BR7601635A BR7601635A BR 7601635 A BR7601635 A BR 7601635A BR 7601635 A BR7601635 A BR 7601635A BR 7601635 A BR7601635 A BR 7601635A BR 7601635 A BR7601635 A BR 7601635A
Authority
BR
Brazil
Prior art keywords
semiconductor device
conjugated binding
forming conjugated
bosses
binding bosses
Prior art date
Application number
BR7601635A
Other languages
English (en)
Inventor
J Harris
Original Assignee
Nat Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nat Semiconductor Corp filed Critical Nat Semiconductor Corp
Publication of BR7601635A publication Critical patent/BR7601635A/pt

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/901—Printed circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126—Assembling bases
BR7601635A 1975-05-19 1976-03-18 Processo para formar saliencias ligantes conjugadas,e dispositivo semicondutor BR7601635A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/578,653 US4042954A (en) 1975-05-19 1975-05-19 Method for forming gang bonding bumps on integrated circuit semiconductor devices

Publications (1)

Publication Number Publication Date
BR7601635A true BR7601635A (pt) 1977-02-01

Family

ID=24313745

Family Applications (1)

Application Number Title Priority Date Filing Date
BR7601635A BR7601635A (pt) 1975-05-19 1976-03-18 Processo para formar saliencias ligantes conjugadas,e dispositivo semicondutor

Country Status (5)

Country Link
US (1) US4042954A (pt)
JP (1) JPS51141578A (pt)
BR (1) BR7601635A (pt)
DE (1) DE2621963A1 (pt)
FR (1) FR2312118A1 (pt)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4188438A (en) * 1975-06-02 1980-02-12 National Semiconductor Corporation Antioxidant coating of copper parts for thermal compression gang bonding of semiconductive devices
US4017890A (en) * 1975-10-24 1977-04-12 International Business Machines Corporation Intermetallic compound layer in thin films for improved electromigration resistance
US4176443A (en) * 1977-03-08 1979-12-04 Sgs-Ates Componenti Elettronici S.P.A. Method of connecting semiconductor structure to external circuits
JPS53110465A (en) * 1977-03-09 1978-09-27 Nec Corp Semiconductor device
US4293637A (en) * 1977-05-31 1981-10-06 Matsushita Electric Industrial Co., Ltd. Method of making metal electrode of semiconductor device
US4273859A (en) * 1979-12-31 1981-06-16 Honeywell Information Systems Inc. Method of forming solder bump terminals on semiconductor elements
EP0060253A1 (en) * 1980-09-15 1982-09-22 Mostek Corporation Integrated circuit power distribution network
NL8600021A (nl) * 1986-01-08 1987-08-03 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij op een halfgeleiderlichaam een metallisatie met een dikke aansluitelektrode wordt aangebracht.
US4950623A (en) * 1988-08-02 1990-08-21 Microelectronics Center Of North Carolina Method of building solder bumps
JPH03233972A (ja) * 1990-02-08 1991-10-17 Matsushita Electron Corp 半導体装置用電極およびその製造方法
US5118584A (en) * 1990-06-01 1992-06-02 Eastman Kodak Company Method of producing microbump circuits for flip chip mounting
US5053851A (en) * 1991-01-14 1991-10-01 International Business Machines Corp. Metal bump for a thermal compression bond and method for making same
US5156997A (en) * 1991-02-11 1992-10-20 Microelectronics And Computer Technology Corporation Method of making semiconductor bonding bumps using metal cluster ion deposition
US5331172A (en) * 1991-02-11 1994-07-19 Microelectronics And Computer Technology Corporation Ionized metal cluster beam systems and methods
US5147819A (en) * 1991-02-21 1992-09-15 Micron Technology, Inc. Semiconductor metallization method
US5289631A (en) * 1992-03-04 1994-03-01 Mcnc Method for testing, burn-in, and/or programming of integrated circuit chips
EP1134805B1 (en) * 1995-03-20 2004-07-21 Unitive International Limited Solder bump fabrication methods and structure including a titanium barrier layer
US6157079A (en) * 1997-11-10 2000-12-05 Citizen Watch Co., Ltd Semiconductor device with a bump including a bump electrode film covering a projecting photoresist
TW591780B (en) * 2003-03-21 2004-06-11 Univ Nat Central Flip chip Au bump structure and method of manufacturing the same
JP2005191541A (ja) * 2003-12-05 2005-07-14 Seiko Epson Corp 半導体装置、半導体チップ、半導体装置の製造方法及び電子機器
US9984987B2 (en) 2016-08-05 2018-05-29 Nanya Technology Corporation Semiconductor structure and manufacturing method thereof

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1363491A (fr) * 1962-05-25 1964-06-12 Int Standard Electric Corp Couche métallique adhérente pour connexions électriques, en particulier pour les organes semi-conducteurs
US3480841A (en) * 1967-01-13 1969-11-25 Ibm Solderable backside ohmic contact metal system for semiconductor devices and fabrication process therefor
US3622385A (en) * 1968-07-19 1971-11-23 Hughes Aircraft Co Method of providing flip-chip devices with solderable connections
BE763522A (fr) * 1970-03-03 1971-07-16 Licentia Gmbh Serie de couches de contact pour des elements de construction semi-conducteurs

Also Published As

Publication number Publication date
FR2312118A1 (fr) 1976-12-17
US4042954A (en) 1977-08-16
DE2621963A1 (de) 1976-12-02
JPS51141578A (en) 1976-12-06

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