BRPI0906426A2 - tradução de endereço dinâmico com gerenciamento de quadro - Google Patents

tradução de endereço dinâmico com gerenciamento de quadro

Info

Publication number
BRPI0906426A2
BRPI0906426A2 BRPI0906426A BRPI0906426A BRPI0906426A2 BR PI0906426 A2 BRPI0906426 A2 BR PI0906426A2 BR PI0906426 A BRPI0906426 A BR PI0906426A BR PI0906426 A BRPI0906426 A BR PI0906426A BR PI0906426 A2 BRPI0906426 A2 BR PI0906426A2
Authority
BR
Brazil
Prior art keywords
block
data
frame
instruction
general register
Prior art date
Application number
BRPI0906426A
Other languages
English (en)
Inventor
Charles Gainey Jr
Damian Osisek
Dan Greiner
Gustav Sittmann Iii
Lisa Heller
Timothy Slegel
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BRPI0906426A2 publication Critical patent/BRPI0906426A2/pt
Publication of BRPI0906426B1 publication Critical patent/BRPI0906426B1/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466—Key-lock mechanism
    • G06F12/1475—Key-lock mechanism in a virtual system, e.g. with translation means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30047—Prefetch instructions; cache control instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Machine Translation (AREA)
  • Storage Device Security (AREA)
  • Devices For Executing Special Programs (AREA)
  • Medicines Containing Material From Animals Or Micro-Organisms (AREA)
BRPI0906426-5A 2008-01-11 2009-01-05 Tradução de endereço dinâmica com gerenciamento de quadro BRPI0906426B1 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/972,725 2008-01-11
US11/972,725 US8417916B2 (en) 2008-01-11 2008-01-11 Perform frame management function instruction for setting storage keys and clearing blocks of main storage
PCT/EP2009/050051 WO2009087134A1 (en) 2008-01-11 2009-01-05 Dynamic address translation with frame management

Publications (2)

Publication Number Publication Date
BRPI0906426A2 true BRPI0906426A2 (pt) 2016-10-11
BRPI0906426B1 BRPI0906426B1 (pt) 2020-12-01

Family

ID=40428033

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0906426-5A BRPI0906426B1 (pt) 2008-01-11 2009-01-05 Tradução de endereço dinâmica com gerenciamento de quadro

Country Status (16)

Country Link
US (1) US8417916B2 (pt)
EP (1) EP2229631B1 (pt)
JP (1) JP4815539B2 (pt)
KR (1) KR101310412B1 (pt)
CN (1) CN101911024B (pt)
AT (1) ATE551653T1 (pt)
BR (1) BRPI0906426B1 (pt)
CA (1) CA2701086C (pt)
CY (1) CY1112694T1 (pt)
DK (1) DK2229631T3 (pt)
ES (1) ES2381428T3 (pt)
IL (1) IL206847A (pt)
PL (1) PL2229631T3 (pt)
PT (1) PT2229631E (pt)
SI (1) SI2229631T1 (pt)
WO (1) WO2009087134A1 (pt)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8151083B2 (en) 2008-01-11 2012-04-03 International Business Machines Corporation Dynamic address translation with frame management
US8041922B2 (en) * 2008-01-11 2011-10-18 International Business Machines Corporation Enhanced dynamic address translation with load real address function
US8037278B2 (en) 2008-01-11 2011-10-11 International Business Machines Corporation Dynamic address translation with format control
US8103851B2 (en) 2008-01-11 2012-01-24 International Business Machines Corporation Dynamic address translation with translation table entry format control for indentifying format of the translation table entry
US8019964B2 (en) 2008-01-11 2011-09-13 International Buisness Machines Corporation Dynamic address translation with DAT protection
US8082405B2 (en) * 2008-01-11 2011-12-20 International Business Machines Corporation Dynamic address translation with fetch protection
US8677098B2 (en) 2008-01-11 2014-03-18 International Business Machines Corporation Dynamic address translation with fetch protection
US8335906B2 (en) * 2008-01-11 2012-12-18 International Business Machines Corporation Perform frame management function instruction for clearing blocks of main storage
US8117417B2 (en) 2008-01-11 2012-02-14 International Business Machines Corporation Dynamic address translation with change record override
US8041923B2 (en) 2008-01-11 2011-10-18 International Business Machines Corporation Load page table entry address instruction execution based on an address translation format control field
US8086811B2 (en) 2008-02-25 2011-12-27 International Business Machines Corporation Optimizations of a perform frame management function issued by pageable guests
US8176280B2 (en) 2008-02-25 2012-05-08 International Business Machines Corporation Use of test protection instruction in computing environments that support pageable guests
US8095773B2 (en) 2008-02-26 2012-01-10 International Business Machines Corporation Dynamic address translation with translation exception qualifier
US8806179B2 (en) 2009-12-15 2014-08-12 International Business Machines Corporation Non-quiescing key setting facility
JP4915756B2 (ja) * 2009-12-16 2012-04-11 インターナショナル・ビジネス・マシーンズ・コーポレーション アドレス変換を高速化する方法及びシステム
US8782434B1 (en) 2010-07-15 2014-07-15 The Research Foundation For The State University Of New York System and method for validating program execution at run-time
US9063721B2 (en) 2012-09-14 2015-06-23 The Research Foundation For The State University Of New York Continuous run-time validation of program execution: a practical approach
US9069782B2 (en) 2012-10-01 2015-06-30 The Research Foundation For The State University Of New York System and method for security and privacy aware virtual machine checkpointing
GB2514618B (en) * 2013-05-31 2020-11-11 Advanced Risc Mach Ltd Data processing systems
DE102013216885B4 (de) 2013-08-26 2025-03-27 Volkswagen Aktiengesellschaft Fahrzeugsitz mit einer Massageeinrichtung und mindestens einer Heizeinrichtung zur Umsetzung einer "Hot-Stone"-Massagefunktion"
US9996349B2 (en) * 2015-01-27 2018-06-12 International Business Machines Corporation Clearing specified blocks of main storage
CN109478139B (zh) * 2016-08-13 2024-01-23 英特尔公司 用于共享存储器中的访问同步的装置、方法和系统
US11182507B2 (en) 2018-08-30 2021-11-23 Micron Technology, Inc. Domain crossing in executing instructions in computer processors
US11500665B2 (en) * 2018-08-30 2022-11-15 Micron Technology, Inc. Dynamic configuration of a computer processor based on the presence of a hypervisor
US11481241B2 (en) 2018-08-30 2022-10-25 Micron Technology, Inc. Virtual machine register in a computer processor
CN110837372B (zh) * 2019-11-04 2021-01-26 贵阳动视云科技有限公司 汇编代码清除混淆的方法、装置、介质及设备
CN112965724B (zh) * 2021-03-22 2024-06-07 中国信息安全测评中心 一种固件的装载基址范围的确定方法及系统

Family Cites Families (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4972338A (en) * 1985-06-13 1990-11-20 Intel Corporation Memory management for microprocessor system
JP2635058B2 (ja) * 1987-11-11 1997-07-30 株式会社日立製作所 アドレス変換方式
US5058003A (en) * 1988-12-15 1991-10-15 International Business Machines Corporation Virtual storage dynamic address translation mechanism for multiple-sized pages
US5237668A (en) 1989-10-20 1993-08-17 International Business Machines Corporation Process using virtual addressing in a non-privileged instruction to control the copying of a page of data in or between multiple media
US5617554A (en) * 1992-02-10 1997-04-01 Intel Corporation Physical address size selection and page size selection in an address translator
JPH0715667B2 (ja) 1992-02-14 1995-02-22 株式会社日立製作所 データ処理装置
JP3137747B2 (ja) 1992-07-09 2001-02-26 株式会社リコー 昇華型熱転写用受像シート
AU6629894A (en) * 1993-05-07 1994-12-12 Apple Computer, Inc. Method for decoding guest instructions for a host computer
US5551013A (en) * 1994-06-03 1996-08-27 International Business Machines Corporation Multiprocessor for hardware emulation
US5845331A (en) * 1994-09-28 1998-12-01 Massachusetts Institute Of Technology Memory system including guarded pointers
US5790825A (en) * 1995-11-08 1998-08-04 Apple Computer, Inc. Method for emulating guest instructions on a host computer through dynamic recompilation of host instructions
GB2325061B (en) * 1997-04-30 2001-06-06 Advanced Risc Mach Ltd Memory access protection
US6009261A (en) * 1997-12-16 1999-12-28 International Business Machines Corporation Preprocessing of stored target routines for emulating incompatible instructions on a target processor
US6308255B1 (en) * 1998-05-26 2001-10-23 Advanced Micro Devices, Inc. Symmetrical multiprocessing bus and chipset used for coprocessor support allowing non-native code to run in a system
US6463582B1 (en) * 1998-10-21 2002-10-08 Fujitsu Limited Dynamic optimizing object code translator for architecture emulation and dynamic optimizing object code translation method
DE10002120B4 (de) * 1999-02-13 2006-04-20 International Business Machines Corp. Adressumsetzpufferanordnung und Verfahren für den Betrieb einer Adressumsetzpufferanordnung
US7069412B2 (en) * 1999-02-17 2006-06-27 Elbrus International Method of using a plurality of virtual memory spaces for providing efficient binary compatibility between a plurality of source architectures and a single target architecture
FR2814557B1 (fr) * 2000-09-27 2002-12-27 Gemplus Card Int Protection contre l'exploitation abusive d'une instruction dans une memoire
US6574706B2 (en) * 2001-02-28 2003-06-03 International Business Machines Corporation Managing unvirtualized data pages in real storage
US6985951B2 (en) * 2001-03-08 2006-01-10 International Business Machines Corporation Inter-partition message passing method, system and program product for managing workload in a partitioned processing environment
US7299243B2 (en) * 2001-09-19 2007-11-20 Bmc Software, Inc. System and method for controlling free space distribution by key range within a database
US7120746B2 (en) * 2002-09-09 2006-10-10 International Business Machines Corporation Technique for data transfer
US7703097B2 (en) * 2002-11-15 2010-04-20 International Business Machines Corporation Auto-commit processing in an IMS batch application
US7020761B2 (en) * 2003-05-12 2006-03-28 International Business Machines Corporation Blocking processing restrictions based on page indices
US7284100B2 (en) 2003-05-12 2007-10-16 International Business Machines Corporation Invalidating storage, clearing buffer entries, and an instruction therefor
US7530067B2 (en) * 2003-05-12 2009-05-05 International Business Machines Corporation Filtering processor requests based on identifiers
US6996698B2 (en) * 2003-05-12 2006-02-07 International Business Machines Corporation Blocking processing restrictions based on addresses
US7234037B2 (en) * 2003-11-25 2007-06-19 International Business Machines Corporation Memory mapped Input/Output operations
US8214622B2 (en) * 2004-05-27 2012-07-03 International Business Machines Corporation Facilitating management of storage of a pageable mode virtual environment absent intervention of a host of the environment
US7941799B2 (en) * 2004-05-27 2011-05-10 International Business Machines Corporation Interpreting I/O operation requests from pageable guests without host intervention
US8387049B2 (en) * 2005-07-15 2013-02-26 International Business Machines Corporation Facilitating processing within computing environments supporting pageable guests
US7464249B2 (en) * 2005-07-26 2008-12-09 International Business Machines Corporation System and method for alias mapping of address space
JP4469783B2 (ja) * 2005-11-28 2010-05-26 株式会社東芝 メモリ保護装置、メモリ保護システムおよびメモリ保護方法
JP5073417B2 (ja) 2007-08-27 2012-11-14 株式会社ディスコ チャックテーブル
US8082405B2 (en) * 2008-01-11 2011-12-20 International Business Machines Corporation Dynamic address translation with fetch protection
US8103851B2 (en) * 2008-01-11 2012-01-24 International Business Machines Corporation Dynamic address translation with translation table entry format control for indentifying format of the translation table entry
US8041923B2 (en) * 2008-01-11 2011-10-18 International Business Machines Corporation Load page table entry address instruction execution based on an address translation format control field
US8041922B2 (en) * 2008-01-11 2011-10-18 International Business Machines Corporation Enhanced dynamic address translation with load real address function
US8037278B2 (en) * 2008-01-11 2011-10-11 International Business Machines Corporation Dynamic address translation with format control
US8335906B2 (en) * 2008-01-11 2012-12-18 International Business Machines Corporation Perform frame management function instruction for clearing blocks of main storage
US8677098B2 (en) * 2008-01-11 2014-03-18 International Business Machines Corporation Dynamic address translation with fetch protection
US8117417B2 (en) * 2008-01-11 2012-02-14 International Business Machines Corporation Dynamic address translation with change record override
US8151083B2 (en) * 2008-01-11 2012-04-03 International Business Machines Corporation Dynamic address translation with frame management
US8019964B2 (en) * 2008-01-11 2011-09-13 International Buisness Machines Corporation Dynamic address translation with DAT protection
US8095773B2 (en) * 2008-02-26 2012-01-10 International Business Machines Corporation Dynamic address translation with translation exception qualifier

Also Published As

Publication number Publication date
EP2229631A1 (en) 2010-09-22
JP4815539B2 (ja) 2011-11-16
WO2009087134A1 (en) 2009-07-16
DK2229631T3 (da) 2012-05-07
CN101911024A (zh) 2010-12-08
IL206847A0 (en) 2010-12-30
ATE551653T1 (de) 2012-04-15
KR20100101616A (ko) 2010-09-17
EP2229631B1 (en) 2012-03-28
PT2229631E (pt) 2012-05-11
US20090187724A1 (en) 2009-07-23
KR101310412B1 (ko) 2013-09-23
BRPI0906426B1 (pt) 2020-12-01
CN101911024B (zh) 2012-11-14
ES2381428T3 (es) 2012-05-28
CA2701086A1 (en) 2009-07-16
JP2011509471A (ja) 2011-03-24
CA2701086C (en) 2017-09-19
IL206847A (en) 2013-07-31
US8417916B2 (en) 2013-04-09
CY1112694T1 (el) 2016-02-10
SI2229631T1 (sl) 2012-05-31
PL2229631T3 (pl) 2012-11-30

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Legal Events

Date Code Title Description
B11A Dismissal acc. art.33 of ipl - examination not requested within 36 months of filing
B04C Request for examination: application reinstated [chapter 4.3 patent gazette]
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

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