BRPI0918901A8 - Método e dispositivo para decodificar bloco de transporte, e, método e dispositivo para decodificação iterativa de bloco de transporte - Google Patents
Método e dispositivo para decodificar bloco de transporte, e, método e dispositivo para decodificação iterativa de bloco de transporteInfo
- Publication number
- BRPI0918901A8 BRPI0918901A8 BRPI0918901A BRPI0918901A BRPI0918901A8 BR PI0918901 A8 BRPI0918901 A8 BR PI0918901A8 BR PI0918901 A BRPI0918901 A BR PI0918901A BR PI0918901 A BRPI0918901 A BR PI0918901A BR PI0918901 A8 BRPI0918901 A8 BR PI0918901A8
- Authority
- BR
- Brazil
- Prior art keywords
- decoding
- block
- crc
- transport block
- sub
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 6
- 230000005055 memory storage Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
- H03M13/093—CRC update after modification of the information word
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2948—Iterative decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/2975—Judging correct decoding, e.g. iteration stopping criteria
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6522—Intended application, e.g. transmission or communication standard
- H03M13/6525—3GPP LTE including E-UTRA
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0047—Decoding adapted to other signal detection operation
- H04L1/005—Iterative decoding, including iteration between signal detection and decoding operation
- H04L1/0051—Stopping criteria
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
- H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2948—Iterative decoding
- H03M13/2951—Iterative decoding using iteration stopping criteria
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/3746—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with iterative decoding
- H03M13/3753—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with iterative decoding using iteration stopping criteria
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Detection And Correction Of Errors (AREA)
Abstract
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/234,067 US20090077457A1 (en) | 2007-09-19 | 2008-09-19 | Iterative decoding of blocks with cyclic redundancy checks |
| US12/234,067 | 2008-09-19 | ||
| PCT/IB2009/006856 WO2010032108A2 (en) | 2008-09-19 | 2009-09-16 | Iterative decoding of blocks with cyclic redundancy checks |
Publications (4)
| Publication Number | Publication Date |
|---|---|
| BRPI0918901A2 BRPI0918901A2 (pt) | 2015-12-08 |
| BRPI0918901A8 true BRPI0918901A8 (pt) | 2018-06-12 |
| BRPI0918901B1 BRPI0918901B1 (pt) | 2020-09-15 |
| BRPI0918901B8 BRPI0918901B8 (pt) | 2021-02-02 |
Family
ID=41666597
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BRPI0918901A BRPI0918901B8 (pt) | 2008-09-19 | 2009-09-16 | método e dispositivo para decodificar bloco de transporte, e, método e dispositivo para decodificação iterativa de bloco de transporte. |
Country Status (7)
| Country | Link |
|---|---|
| US (3) | US20090077457A1 (pt) |
| EP (1) | EP2327179B1 (pt) |
| CN (2) | CN102160315B (pt) |
| AU (1) | AU2009294359B2 (pt) |
| BR (1) | BRPI0918901B8 (pt) |
| CA (1) | CA2737416C (pt) |
| WO (1) | WO2010032108A2 (pt) |
Families Citing this family (60)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9686044B2 (en) * | 2007-03-27 | 2017-06-20 | Qualcomm Incorporated | Rate matching with multiple code block sizes |
| US20090077457A1 (en) | 2007-09-19 | 2009-03-19 | Rajaram Ramesh | Iterative decoding of blocks with cyclic redundancy checks |
| CN101753265B (zh) * | 2008-12-16 | 2012-12-12 | 华为技术有限公司 | 虚警校验方法、装置及用户设备 |
| US8572460B2 (en) * | 2009-03-17 | 2013-10-29 | Broadcom Corporation | Communication device employing binary product coding with selective additional cyclic redundancy check (CRC) therein |
| US8667522B1 (en) * | 2009-08-26 | 2014-03-04 | Arris Enterprises, Inc. | Channel scanning |
| CN102577200A (zh) * | 2009-11-26 | 2012-07-11 | 上海贝尔股份有限公司 | 信道解码方法及其设备 |
| US8621319B2 (en) * | 2009-12-14 | 2013-12-31 | Electronics And Telecommunications Research Institute | Method and apparatus for iterative determination of MIMO iterative receiver |
| KR101311504B1 (ko) | 2009-12-14 | 2013-09-25 | 연세대학교 산학협력단 | 다중 입력 다중 출력 반복 수신기의 반복 결정 방법 및 장치 |
| US8959421B2 (en) | 2010-05-21 | 2015-02-17 | Nec Corporation | Decoding device and decoding order control method |
| US9125068B2 (en) | 2010-06-04 | 2015-09-01 | Ixia | Methods, systems, and computer readable media for simulating realistic movement of user equipment in a long term evolution (LTE) network |
| US8504893B1 (en) * | 2010-09-30 | 2013-08-06 | Micron Technology, Inc. | Error detection or correction of a portion of a codeword in a memory device |
| JP2013021544A (ja) * | 2011-07-12 | 2013-01-31 | Fujitsu Ltd | 無線通信システム、無線通信装置及び無線通信方法 |
| JP5760920B2 (ja) * | 2011-09-30 | 2015-08-12 | 富士通株式会社 | 符号化信号の繰り返し復号法及び符号化信号の繰り返し復号装置 |
| EP2579468B1 (en) * | 2011-10-05 | 2020-05-06 | Telefonaktiebolaget LM Ericsson (publ) | Method and device for decoding a transport block of a communication signal |
| US8855070B2 (en) | 2011-12-14 | 2014-10-07 | Ixia | Methods, systems, and computer readable media for improved long term evolution (LTE) hybrid automatic repeat request (HARQ) processing |
| US9154979B2 (en) | 2011-12-14 | 2015-10-06 | Ixia | Scalable architecture for long term evolution (LTE) multiple user equipment (multi-UE) simulation |
| US9204325B2 (en) | 2011-12-20 | 2015-12-01 | Ixia | Methods, systems, and computer readable media for reducing the impact of false downlink control information (DCI) detection in long term evolution (LTE) physical downlink control channel (PDCCH) data |
| US8839062B2 (en) * | 2012-01-11 | 2014-09-16 | International Business Machines Corporation | Incremental modification of an error detection code background of the invention |
| US9071995B2 (en) | 2012-01-17 | 2015-06-30 | Ixia | Methods, systems, and computer readable media for long term evolution (LTE) uplink data processing |
| US8908535B2 (en) | 2012-02-10 | 2014-12-09 | Ixia | Methods, traffic simulators, and computer readable media for validating long term evolution (LTE) code blocks and transport blocks |
| US8724498B2 (en) | 2012-02-14 | 2014-05-13 | Ixia | Methods, systems, and computer readable media for performing long term evolution (LTE) channel delineation |
| US8892829B2 (en) | 2012-02-29 | 2014-11-18 | Ixia | Methods, systems, and computer readable media for integrated sub-block interleaving and rate matching |
| US8738985B2 (en) * | 2012-03-28 | 2014-05-27 | Ixia | Methods, systems, and computer readable media for dynamically controlling a turbo decoding process in a long term evolution (LTE) multi-user equipment (UE) traffic simulator |
| US9131000B2 (en) | 2012-04-13 | 2015-09-08 | Ixia | Methods, systems, and computer readable media for heuristics-based adaptive protocol parsing |
| US10440644B2 (en) * | 2012-06-29 | 2019-10-08 | Qualcomm Incorporated | Methods and apparatus for turbo decoder throttling |
| US8929239B2 (en) * | 2012-07-02 | 2015-01-06 | Apple Inc. | Modulation and coding scheme (MCS) recovery based on CQI offset |
| US8839079B2 (en) * | 2012-08-20 | 2014-09-16 | Qualcomm Incorporated | Methods and apparatuses for saving power during transport block decoding in UMTS systems |
| US9060365B2 (en) * | 2013-03-12 | 2015-06-16 | Qualcomm Incorporated | Method and apparatus for sharing decoding time across transport blocks |
| US9026883B2 (en) * | 2013-03-13 | 2015-05-05 | Mediatek Singapore Pte. Ltd. | Decoding apparatus with adaptive control over external buffer interface and turbo decoder and related decoding method thereof |
| US9198065B2 (en) | 2013-03-15 | 2015-11-24 | Ixia | Methods, systems, and computer readable media for utilizing adaptive symbol processing in a multiple user equipment (multi-UE) simulator |
| US10108483B2 (en) | 2013-08-26 | 2018-10-23 | Samsung Electronics Co., Ltd. | Computing system with error handling mechanism and method of operation thereof |
| US9130595B1 (en) | 2013-11-07 | 2015-09-08 | The United States Of America As Represented By The Secretary Of The Navy | System and method for acceleration effect correction using turbo-encoded data with cyclic redundancy check |
| KR102108386B1 (ko) * | 2013-12-23 | 2020-05-08 | 삼성전자주식회사 | 저장 장치 및 그것의 데이터 엔코딩 및 디코딩 방법들 |
| US9287900B2 (en) | 2014-07-10 | 2016-03-15 | International Business Machines Corporation | Decoding of product codes |
| US20160036468A1 (en) * | 2014-08-01 | 2016-02-04 | Intel IP Corporation | Method and device for iterative decoding a data transfer structure |
| US10419024B2 (en) | 2017-05-26 | 2019-09-17 | SK Hynix Inc. | Early termination of low-density parity-check (LDPC) decoding |
| US11515897B2 (en) | 2015-05-29 | 2022-11-29 | SK Hynix Inc. | Data storage device |
| US11177835B2 (en) | 2015-09-25 | 2021-11-16 | SK Hynix Inc. | Data storage device |
| US11611359B2 (en) | 2015-05-29 | 2023-03-21 | SK Hynix Inc. | Data storage device |
| US10396827B2 (en) | 2015-09-25 | 2019-08-27 | SK Hynix Inc. | Data storage device |
| KR102285940B1 (ko) | 2015-05-29 | 2021-08-05 | 에스케이하이닉스 주식회사 | 데이터 처리 회로, 데이터 처리 회로를 포함하는 데이터 저장 장치 및 그것의 동작 방법 |
| US10291375B2 (en) * | 2015-10-05 | 2019-05-14 | Telefonaktiebolaget Lm Ericsson (Publ) | Methods and nodes for communication of a message over a radio link |
| US10291356B2 (en) * | 2016-05-11 | 2019-05-14 | Futurewei Technologies, Inc. | Decoding procedures in systems with codeblock segmentation |
| US10313057B2 (en) * | 2016-06-01 | 2019-06-04 | Qualcomm Incorporated | Error detection in wireless communications using sectional redundancy check information |
| US10469104B2 (en) | 2016-06-14 | 2019-11-05 | Qualcomm Incorporated | Methods and apparatus for compactly describing lifted low-density parity-check (LDPC) codes |
| US10411833B2 (en) * | 2016-07-29 | 2019-09-10 | Qualcomm Incorporated | Early termination techniques for successive decoding processes |
| CN106850131B (zh) * | 2016-11-30 | 2019-09-20 | 中国电子科技集团公司第七研究所 | 迭代解码方法和系统 |
| US20180324103A1 (en) * | 2017-05-04 | 2018-11-08 | Qualcomm Incorporated | Cross-carrier transport block decoding order indication |
| US10312939B2 (en) | 2017-06-10 | 2019-06-04 | Qualcomm Incorporated | Communication techniques involving pairwise orthogonality of adjacent rows in LPDC code |
| US12476733B2 (en) | 2017-06-19 | 2025-11-18 | Qualcomm Incorporated | Communication techniques with self-decodable redundancy versions (RVs) using systematic codes |
| CN110832799B (zh) | 2017-07-07 | 2021-04-02 | 高通股份有限公司 | 应用低密度奇偶校验码基图选择的通信技术 |
| WO2019095190A1 (en) * | 2017-11-16 | 2019-05-23 | Qualcomm Incorporated | Reduced overhead error detection code design for decoding a codeword |
| US10992323B2 (en) | 2019-02-01 | 2021-04-27 | Micron Technology, Inc. | Early decoding termination for a memory sub-system |
| CN111726195B (zh) * | 2019-03-21 | 2021-12-31 | 华为技术有限公司 | 一种数据传输方法及通信装置 |
| US11797396B2 (en) * | 2020-07-30 | 2023-10-24 | Seagate Technology Llc | Decoding policy management to support multiple decoding schemes in a single buffer space |
| CN112202454B (zh) * | 2020-10-14 | 2021-10-01 | 重庆邮电大学 | 利用循环冗余校验的低复杂度选择映射方法 |
| WO2022186853A1 (en) * | 2021-03-03 | 2022-09-09 | Zeku, Inc. | Dynamic cyclic redundancy check update for iterative decoding |
| CN115208516A (zh) * | 2022-07-11 | 2022-10-18 | 上海恩阶电子科技有限公司 | 一种基于crc校验码的数据存储及校验方法 |
| CN119154991B (zh) * | 2023-06-15 | 2025-11-25 | 北京玄戒技术有限公司 | Crc校验方法、装置、通信设备及存储介质 |
| US12500609B2 (en) * | 2024-05-22 | 2025-12-16 | SanDisk Technologies, Inc. | Optimized decoding scheduling in a joint LDPC and RAID decoding scheme |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6292918B1 (en) * | 1998-11-05 | 2001-09-18 | Qualcomm Incorporated | Efficient iterative decoding |
| US20010052104A1 (en) * | 2000-04-20 | 2001-12-13 | Motorola, Inc. | Iteration terminating using quality index criteria of turbo codes |
| US7051268B1 (en) * | 2000-09-29 | 2006-05-23 | Qualcomm Incorporated | Method and apparatus for reducing power consumption of a decoder in a communication system |
| KR100713331B1 (ko) * | 2000-12-23 | 2007-05-04 | 삼성전자주식회사 | 부호분할다중접속 이동통신시스템의 반복복호 중지 장치 및 방법 |
| US6885711B2 (en) * | 2001-06-27 | 2005-04-26 | Qualcomm Inc | Turbo decoder with multiple scale selections |
| US7093180B2 (en) * | 2002-06-28 | 2006-08-15 | Interdigital Technology Corporation | Fast H-ARQ acknowledgement generation method using a stopping rule for turbo decoding |
| TWI350066B (en) * | 2003-04-17 | 2011-10-01 | Icera Inc | Apparatus and method for turbo decoder termination |
| US7383484B2 (en) * | 2004-03-12 | 2008-06-03 | Seagate Technology Llc | Cyclic redundancy check based message passing in turbo product code decoding |
| FR2890806B1 (fr) * | 2005-09-09 | 2008-02-22 | Thales Sa | Procede d'amelioration de decodage iteratif de codes |
| KR100961743B1 (ko) * | 2005-12-09 | 2010-06-07 | 삼성전자주식회사 | 다중 홉 중계방식의 광대역 무선 접속통신시스템에서 중계서비스를 지원하기 위한 장치 및 방법 |
| US20090077457A1 (en) | 2007-09-19 | 2009-03-19 | Rajaram Ramesh | Iterative decoding of blocks with cyclic redundancy checks |
-
2008
- 2008-09-19 US US12/234,067 patent/US20090077457A1/en not_active Abandoned
-
2009
- 2009-09-16 CA CA2737416A patent/CA2737416C/en active Active
- 2009-09-16 WO PCT/IB2009/006856 patent/WO2010032108A2/en not_active Ceased
- 2009-09-16 CN CN200980136571.5A patent/CN102160315B/zh not_active Expired - Fee Related
- 2009-09-16 AU AU2009294359A patent/AU2009294359B2/en not_active Ceased
- 2009-09-16 EP EP09786257.7A patent/EP2327179B1/en not_active Not-in-force
- 2009-09-16 CN CN201410496300.3A patent/CN104202126B/zh not_active Expired - Fee Related
- 2009-09-16 BR BRPI0918901A patent/BRPI0918901B8/pt not_active IP Right Cessation
-
2011
- 2011-10-25 US US13/281,291 patent/US8527843B2/en not_active Expired - Fee Related
-
2013
- 2013-07-31 US US13/956,136 patent/US9197246B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| BRPI0918901A2 (pt) | 2015-12-08 |
| US20120042226A1 (en) | 2012-02-16 |
| US8527843B2 (en) | 2013-09-03 |
| WO2010032108A2 (en) | 2010-03-25 |
| EP2327179A2 (en) | 2011-06-01 |
| CN102160315B (zh) | 2014-11-05 |
| AU2009294359B2 (en) | 2015-11-12 |
| CA2737416C (en) | 2017-01-03 |
| EP2327179B1 (en) | 2015-11-11 |
| BRPI0918901B8 (pt) | 2021-02-02 |
| CN104202126A (zh) | 2014-12-10 |
| WO2010032108A3 (en) | 2010-05-14 |
| US9197246B2 (en) | 2015-11-24 |
| AU2009294359A1 (en) | 2010-03-25 |
| CN104202126B (zh) | 2017-10-24 |
| CA2737416A1 (en) | 2010-03-25 |
| US20130311858A1 (en) | 2013-11-21 |
| BRPI0918901B1 (pt) | 2020-09-15 |
| CN102160315A (zh) | 2011-08-17 |
| US20090077457A1 (en) | 2009-03-19 |
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