BRPI0925055A2 - "otimizações para um sistema de memória transacional ilimitada (utm)" - Google Patents

"otimizações para um sistema de memória transacional ilimitada (utm)"

Info

Publication number
BRPI0925055A2
BRPI0925055A2 BRPI0925055-7A BRPI0925055A BRPI0925055A2 BR PI0925055 A2 BRPI0925055 A2 BR PI0925055A2 BR PI0925055 A BRPI0925055 A BR PI0925055A BR PI0925055 A2 BRPI0925055 A2 BR PI0925055A2
Authority
BR
Brazil
Prior art keywords
utm
optimizations
transactional memory
unlimited
unlimited transactional
Prior art date
Application number
BRPI0925055-7A
Other languages
English (en)
Inventor
Gad Sheaffer
Jan Gray
Burton Smith
Ali-Reza Adl-Tabatabai
Robert Geva
Vadim Bassin
David Callahan
Yang Ni
Bratin Saha
Martin Taillefer
Shlomo Raikin
Koichi Yamada
Landy Wang
Arun Kishan
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of BRPI0925055A2 publication Critical patent/BRPI0925055A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30185—Instruction operation extension or modification according to one or more bits in the instruction, e.g. prefix, sub-opcode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526—Mutual exclusion algorithms
    • G06F9/528—Mutual exclusion algorithms by using speculative mechanisms
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40—Specific encoding of data in memory or cache
    • G06F2212/401—Compressed data

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
BRPI0925055-7A 2009-06-26 2009-06-26 "otimizações para um sistema de memória transacional ilimitada (utm)" BRPI0925055A2 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2009/048947 WO2010151267A1 (en) 2009-06-26 2009-06-26 Optimizations for an unbounded transactional memory (utm) system

Publications (1)

Publication Number Publication Date
BRPI0925055A2 true BRPI0925055A2 (pt) 2015-07-28

Family

ID=43386805

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0925055-7A BRPI0925055A2 (pt) 2009-06-26 2009-06-26 "otimizações para um sistema de memória transacional ilimitada (utm)"

Country Status (7)

Country Link
JP (1) JP5608738B2 (pt)
KR (1) KR101370314B1 (pt)
CN (1) CN102460376B (pt)
BR (1) BRPI0925055A2 (pt)
DE (1) DE112009005006T5 (pt)
GB (1) GB2484416B (pt)
WO (1) WO2010151267A1 (pt)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117056157A (zh) * 2023-10-11 2023-11-14 沐曦集成电路(上海)有限公司 一种寄存器层次化验证方法、存储介质和电子设备

Families Citing this family (63)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8316194B2 (en) 2009-12-15 2012-11-20 Intel Corporation Mechanisms to accelerate transactions using buffered stores
US8521995B2 (en) 2009-12-15 2013-08-27 Intel Corporation Handling operating system (OS) transitions in an unbounded transactional memory (UTM) mode
US8095824B2 (en) 2009-12-15 2012-01-10 Intel Corporation Performing mode switching in an unbounded transactional memory (UTM) system
US9477515B2 (en) 2009-12-15 2016-10-25 Intel Corporation Handling operating system (OS) transitions in an unbounded transactional memory (UTM) mode
US9384004B2 (en) 2012-06-15 2016-07-05 International Business Machines Corporation Randomized testing within transactional execution
US9448796B2 (en) 2012-06-15 2016-09-20 International Business Machines Corporation Restricted instructions in transactional execution
US8688661B2 (en) 2012-06-15 2014-04-01 International Business Machines Corporation Transactional processing
US9336046B2 (en) 2012-06-15 2016-05-10 International Business Machines Corporation Transaction abort processing
US8682877B2 (en) 2012-06-15 2014-03-25 International Business Machines Corporation Constrained transaction execution
US9436477B2 (en) 2012-06-15 2016-09-06 International Business Machines Corporation Transaction abort instruction
US9361115B2 (en) 2012-06-15 2016-06-07 International Business Machines Corporation Saving/restoring selected registers in transactional processing
US9442737B2 (en) 2012-06-15 2016-09-13 International Business Machines Corporation Restricting processing within a processor to facilitate transaction completion
US9348642B2 (en) 2012-06-15 2016-05-24 International Business Machines Corporation Transaction begin/end instructions
US20130339680A1 (en) * 2012-06-15 2013-12-19 International Business Machines Corporation Nontransactional store instruction
US10437602B2 (en) 2012-06-15 2019-10-08 International Business Machines Corporation Program interruption filtering in transactional execution
US9740549B2 (en) 2012-06-15 2017-08-22 International Business Machines Corporation Facilitating transaction completion subsequent to repeated aborts of the transaction
US9772854B2 (en) * 2012-06-15 2017-09-26 International Business Machines Corporation Selectively controlling instruction execution in transactional processing
CN102830953B (zh) * 2012-08-02 2017-08-25 中兴通讯股份有限公司 指令处理方法及网络处理器指令处理装置
US9547594B2 (en) * 2013-03-15 2017-01-17 Intel Corporation Instructions to mark beginning and end of non transactional code region requiring write back to persistent storage
US9697040B2 (en) * 2014-03-26 2017-07-04 Intel Corporation Software replayer for transactional memory programs
US9710245B2 (en) * 2014-04-04 2017-07-18 Qualcomm Incorporated Memory reference metadata for compiler optimization
US9195593B1 (en) * 2014-09-27 2015-11-24 Oracle International Corporation Hardware assisted object memory migration
US9952987B2 (en) * 2014-11-25 2018-04-24 Intel Corporation Posted interrupt architecture
US9451307B2 (en) * 2014-12-08 2016-09-20 Microsoft Technology Licensing, Llc Generating recommendations based on processing content item metadata tags
CN106662998A (zh) * 2014-12-31 2017-05-10 华为技术有限公司 事务冲突检测方法、装置及计算机系统
US11086521B2 (en) * 2015-01-20 2021-08-10 Ultrata, Llc Object memory data flow instruction execution
WO2016154115A1 (en) * 2015-03-20 2016-09-29 Mill Computing, Inc. Cpu security mechanisms employing thread-specific protection domains
US9747218B2 (en) 2015-03-20 2017-08-29 Mill Computing, Inc. CPU security mechanisms employing thread-specific protection domains
US9798900B2 (en) * 2015-03-26 2017-10-24 Intel Corporation Flexible counter system for memory protection
GB2539428B (en) 2015-06-16 2020-09-09 Advanced Risc Mach Ltd Data processing apparatus and method with ownership table
GB2539433B8 (en) 2015-06-16 2018-02-21 Advanced Risc Mach Ltd Protected exception handling
GB2539429B (en) 2015-06-16 2017-09-06 Advanced Risc Mach Ltd Address translation
US10180803B2 (en) 2015-07-28 2019-01-15 Futurewei Technologies, Inc. Intelligent memory architecture for increased efficiency
US9760432B2 (en) 2015-07-28 2017-09-12 Futurewei Technologies, Inc. Intelligent code apparatus, method, and computer program for memory
US9921754B2 (en) 2015-07-28 2018-03-20 Futurewei Technologies, Inc. Dynamic coding algorithm for intelligent coded memory system
US10019360B2 (en) * 2015-09-26 2018-07-10 Intel Corporation Hardware predictor using a cache line demotion instruction to reduce performance inversion in core-to-core data transfers
GB2543306B (en) * 2015-10-14 2019-05-01 Advanced Risc Mach Ltd Exception handling
US10437480B2 (en) 2015-12-01 2019-10-08 Futurewei Technologies, Inc. Intelligent coded memory architecture with enhanced access scheduler
US9996471B2 (en) * 2016-06-28 2018-06-12 Arm Limited Cache with compressed data and tag
US11442760B2 (en) * 2016-07-01 2022-09-13 Intel Corporation Aperture access processors, methods, systems, and instructions
US10191936B2 (en) * 2016-10-31 2019-01-29 Oracle International Corporation Two-tier storage protocol for committing changes in a storage system
CN106411945B (zh) * 2016-11-25 2019-08-06 杭州迪普科技股份有限公司 一种Web的访问方法和装置
US10120805B2 (en) * 2017-01-18 2018-11-06 Intel Corporation Managing memory for secure enclaves
US10579377B2 (en) * 2017-01-19 2020-03-03 International Business Machines Corporation Guarded storage event handling during transactional execution
US10324857B2 (en) * 2017-01-26 2019-06-18 Intel Corporation Linear memory address transformation and management
US10795836B2 (en) * 2017-04-17 2020-10-06 Microsoft Technology Licensing, Llc Data processing performance enhancement for neural networks using a virtualized data iterator
GB2562062B (en) * 2017-05-02 2019-08-14 Advanced Risc Mach Ltd An apparatus and method for managing capability metadata
US10732634B2 (en) * 2017-07-03 2020-08-04 Baidu Us Llc Centralized scheduling system using event loop for operating autonomous driving vehicles
GB2568059B (en) 2017-11-02 2020-04-08 Advanced Risc Mach Ltd Method for locating metadata
US11150910B2 (en) * 2018-02-02 2021-10-19 The Charles Stark Draper Laboratory, Inc. Systems and methods for policy execution processing
GB2573558B (en) * 2018-05-10 2020-09-02 Advanced Risc Mach Ltd A technique for managing a cache structure in a system employing transactional memory
US10783031B2 (en) * 2018-08-20 2020-09-22 Arm Limited Identifying read-set information based on an encoding of replaceable-information values
US10866890B2 (en) * 2018-11-07 2020-12-15 Arm Limited Method and apparatus for implementing lock-free data structures
CN112306956B (zh) * 2019-07-31 2024-04-12 伊姆西Ip控股有限责任公司 用于元数据维护的方法、装置和计算机程序产品
GB2588134B (en) * 2019-10-08 2021-12-01 Imagination Tech Ltd Verification of hardware design for data transformation component
KR102740976B1 (ko) * 2020-04-07 2024-12-11 에스케이하이닉스 주식회사 데이터 처리 시스템, 이를 위한 메모리 컨트롤러 및 그 동작 방법
CN111552619B (zh) * 2020-04-29 2021-05-25 深圳市道旅旅游科技股份有限公司 日志数据展示方法、装置、计算机设备及存储介质
US11372548B2 (en) * 2020-05-29 2022-06-28 Nvidia Corporation Techniques for accessing and utilizing compressed data and its state information
CN114064302B (zh) * 2020-07-30 2024-05-14 华为技术有限公司 一种进程间通信的方法及装置
CN112395093B (zh) * 2020-12-04 2025-07-04 龙芯中科(合肥)技术有限公司 多线程处理方法、装置、电子设备及可读存储介质
US12580844B2 (en) * 2022-01-13 2026-03-17 Nvidia Corporation Network multicasting using alternate sets of directives
CN120596146B (zh) * 2025-05-28 2025-10-31 北京翼华云网科技有限公司 一种多组逻辑寄存器共享一组物理寄存器的优化方法
CN120957201B (zh) * 2025-10-16 2026-02-03 深圳市祺鑫环保科技有限公司 一种基于多信道冗余切换的工业切割机无线通信方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07182241A (ja) * 1993-12-22 1995-07-21 Toshiba Corp キャッシュメモリ制御装置
US7363474B2 (en) * 2001-12-31 2008-04-22 Intel Corporation Method and apparatus for suspending execution of a thread until a specified memory access occurs
US8683143B2 (en) * 2005-12-30 2014-03-25 Intel Corporation Unbounded transactional memory systems
US7991965B2 (en) * 2006-02-07 2011-08-02 Intel Corporation Technique for using memory attributes
US8065499B2 (en) * 2006-02-22 2011-11-22 Oracle America, Inc. Methods and apparatus to implement parallel transactions
US7376807B2 (en) * 2006-02-23 2008-05-20 Freescale Semiconductor, Inc. Data processing system having address translation bypass and method therefor
US7739411B2 (en) * 2006-08-11 2010-06-15 Samsung Electronics Co., Ltd. Method and system for content synchronization and detecting synchronization recursion in networks
WO2008155849A1 (ja) * 2007-06-20 2008-12-24 Fujitsu Limited 演算処理装置、ｔｌｂ制御方法、ｔｌｂ制御プログラムおよび情報処理装置
KR101639672B1 (ko) * 2010-01-05 2016-07-15 삼성전자주식회사 무한 트랜잭션 메모리 시스템 및 그 동작 방법

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117056157A (zh) * 2023-10-11 2023-11-14 沐曦集成电路(上海)有限公司 一种寄存器层次化验证方法、存储介质和电子设备
CN117056157B (zh) * 2023-10-11 2024-01-23 沐曦集成电路(上海)有限公司 一种寄存器层次化验证方法、存储介质和电子设备

Also Published As

Publication number Publication date
DE112009005006T5 (de) 2013-01-10
GB2484416A (en) 2012-04-11
CN102460376B (zh) 2016-05-18
CN102460376A (zh) 2012-05-16
GB201119084D0 (en) 2011-12-21
JP5608738B2 (ja) 2014-10-15
KR20130074726A (ko) 2013-07-04
JP2012530960A (ja) 2012-12-06
KR101370314B1 (ko) 2014-03-05
GB2484416B (en) 2015-02-25
WO2010151267A1 (en) 2010-12-29

Similar Documents

Publication Publication Date Title
BR112012004431A2 (pt) "sistema de estacionamento"
BRPI0912054A2 (pt) sistema de posicionamento
BRPI0813461A2 (pt) Sistema de iluminação de área inteligente
BRPI0716696A2 (pt) Sistema de aplicação para tratamento remoto de um animal
GB2484416B (en) Optimizations for an unbounded transactional memory (utm) system
BRPI0812528A2 (pt) Sistema de fixação
BRPI0814307A2 (pt) Sistema de tratamento presbiópico
BRPI0810346A2 (pt) "sistema de resfriamento"
BRPI1012304A2 (pt) sistema para auxílio de subida
IT1392662B1 (it) Sistema micromeccanico
BRPI0914047A2 (pt) "sistema de iluminação"
BRPI1011492A2 (pt) sistema de gerenciamento de despejo.
BRPI0920229A2 (pt) modelo de memória para atributos de hardware dentro de um sistema de memória transacional
BRPI0814483A2 (pt) Sistema de fixação de quilha
BRPI0911959A2 (pt) sistema de tranferência de cortes
BRPI0923802A2 (pt) Sistema de retenção elástica para um par de óculos.
IT1393652B1 (it) Sistema di fissaggio
IT1394493B1 (it) Sistema di ritenzione per visiere
BRPI0907282A2 (pt) "sistema de travamento"
BRPI0821741A2 (pt) Sistema ii de liberação de droga
BRPI1014156A2 (pt) sistema para o posicionamento de âncora
BRPI0807898A2 (pt) Sistema de escoramento de amortecedor
BRPI0915475A2 (pt) sistema operacional para habilitar acesso móvel
BRPI0821739A2 (pt) Sistema iii de liberação de droga
IT1396986B1 (it) Sistema di fissaggio

Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 10A ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2520 DE 25-04-2019 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.