CA1085659A - Electronic player piano with record and playback feature - Google Patents

Abstract

ABSTRACT OF THE DISCLOSURE
An electronic data storage system including a magnetic type recorder/
replayer for recording spontaneous musical presentations for replay through a similar instrument. Key depression signals are recorded in a serial, self-clocking code where data is represented by flux transitions rather than signal amplitude. Recorded data includes bits for word display and other auxiliary functions. Expression control is provided.

Description

~oss6sa This appl~cat~on ~s a div~sion of ou~ Canadian patent application Serial No. 226,073 filed Ma~ 1, 1975.
This invention relates to data recording and retrieval systems for use in connection with musical instruments ~hereby data defining a musical performance may be spontaneously recorded for later reproductlon via the same or another instrument.
~ t is well known that musical instruments) such as pianos and organs, may be controlled for the reproduction of a musical presentation by way of prerecorded data. The best known form of prerecorded data is the so-called "piano roll" which is essentially a punched paper tape having at least 88 channels which are read in parallel to control the actuation of the piano keys.
The preparation of the prior art piano roll is a painstaking and expensive process and is not susceptible to spontaneous generation or modification to an~ significant extent.
A more recent development in apparatus for recording a musical per-formance for subsequent reproduction involves the use of a tape recorder and ,,: .
a system for recording key depression data on the tape in a single or double channel time-multiplexed sequence thereby to permit the tape to be replayed and demultiplexed to reproduce the musical presentation. This system has the advantage of eliminating the tedious preparation of the piano roll and permit-, ting both carefully and elaborately prerecorded performances as well as spon-taneously prerecorded performances to be reproduced as often as is desired.
~i The prior art tape recorder system involves the production of a rel-atively fixed frequency sinusoidal waveform which is broken up into scan frames i of predetermined length. Each scan frame comprises the serial combination of eighty or more data units represented by sinusoid cycles, each unit being assigned a count and each count representing a piano or organ ke~ or some auxiliary function, s~ch as expression. The prior art system comprises an elaborate mech-. .

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~85659 an~sm including circuitr~ for ampl~tude modulating the sinusoidal waveform with-in each data unit of the scan frame such that a high amplitude le~el represents a "sync" pulse, an intermediate amplitude represents a "key-on" signal, while a low amplitude signal represents a "clock" quantity. In short, the count of the sinusoidal excursion indentifies the particular key within a scan frame and the amplitude level of the waveform excursion represents the particular func-tion to be perfor~ned with respect to that ke~ or, in the absence of a key func-tion code, the excursion is used to resynchronize during the decode operation~
The use of such precise amplitude modulation as is described above within a tape recorder system is extremely di~ficul~ and typically calls for ~ high-cost, precision recording equipment so as to minimize output signal ampli--1 tude variations due to such error causing factors as tape speed changes, tape ;~; stretching, circuit drift, and other factors. ~n brief, the accurate encoding and decoding of data using no less than three distinct amplitude levels in ex-~ tremely short, serial data units is an extremely difficult ta~k giving rise i: to prohibitive cost factors where a commercial unit for home entertainment is concerned~
`~ Disclosed herein is a data recording and retrieval system especially `j for use in combination with musical instruments such as pianos whereby musical ~, 20 performances may be spontaneously recorded and reproduced and, moreover, where-in the system i5 well adapted for implementation using low cost home entertain-ment type tape recording equipment, such as cassette tape recorders and tape ,..
decks. rn general, this is accomplished by means of a system for recording a stream of data in a serial recording medium, such as a magnetic tape, using a binary code wherein the recorded waveform comprises only first and second rel-ative signal levels and relatively abrupt coded transitions between said levels thereby to render the code and the demodulation system completely independent of absolute amplitude levels and the need for analog amplitude detection, thres-'.

hold detection, or othe~ ab~olu~e monitor~TIg devices. In the pref~rred form thedata is recorded in a self-clocking ~inar~ waveform ~therein the key depression signals as well as the clock signal are represented by the positions of transitions between the binar~ levels and the levels or amplitudes themsel~es have no sign-ificance whatever. Accordingly, a single channel tape ma~ be employ~d for the recording of self-clocking data from which both key depression data and clocking data may be readily retrieved.

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~` A further fea~ure of the s~stem disclosed is the expanded data encoding efficiencr which results from the use of transition encoding and the consequent 10 capability of the recorded waveform to actuate or control auxillary devices such as rhythm accompaniments and video displa~s in synchronism with the reproduction .
; of the musical per~ormance. In general, this is accomplished b~ allocating cer-ain data units within a scan frame to the recording of the auxiliary drive data in the same transition code between binar~ signal levels as the musical data it-self and, during demodulation, segregating such signals and using such signals f'.,'~ for the direct excitation and control of the auxiliar~ devices.
~ rn accordance with the present invention there is provided a magnetic , ...
tape for use with a piano having a magnetic tape reading unit and selectively actuatable key note depression devices controlled b~ said magnetic tape reading : `
20 unit, said magnetic tape ~ontaining a serial arrangement of data cells physical-ly arranged in a single track of said tape, said serial arrangement of data cells being sub-divided into a sequential series of data cell frames of fixed length, the improvement wherein the musical data in each said data cell frame is indepen-dent of the amplitude of magnetization of said tape and is solel~ in the form of abrupt magnetic flux transitions representing logical combinations of clock data and ke~ note actuation data, there being at least one abrupt magnetic flux transition per data cell to constituke said clock data and adapted to control the translation of each frame of serially arranged data cells to parallel data and ,: ;. , * . . ,, ~ , .

~S6~9 apply the key note signals in each data cell frame simultaneously to said sel-ectively actuatable key note depression devices to thereby control the recreation of a musical production on said piano.
Further features and advantages of the present inventlon will become apparent upon reading the following specification. It is to be noted that while the invention is described with reference to a system for both recording and reproducing data defining a musical performance, the invention contemplates the possibilit~ of recording musical performance data at one location and facility and repla~ing or reproducing the performance at ano~her location and facility~
Thus, the advantages of the present invention may be realized within a repro-duction system having no spontaneous recording capability. For a thorough under-standing of the invention reference should be taken to the accompanying specification and drawings.

., ~ ., i ~ BRIEF DESCRIPTION OF THE DRAWINGS
"` PIGURE 1 is a block diagram of the data recording and reproduction s~stem;
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FIGURE 2 is a diagram o~ data recording format within a scan frame;
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IGURE 3 is a block diagram of an expression control system;

FIGURE 4 is a circuit diagram of second automatic expression control 2Q system;

FIGURE 5 is a block diagram of a multiplexing system;

FIGURE 6 is a bi-phase encoder;

FIGURE 7 is a wave diagram illustrating the operation o~ the encoder of PIGURE 6;

FIGURE 8 is a second encoder;

FIGURE 9 is a wave diagram for the encoder of FIGURE 8;

FIGURE 10 is a schematic circuit diagram of a receiver;

FIGURE 11 is a circuit diagram of a bi-phase decoder;

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FIGURE 12 is a waveform dlagram for the decoder o~ FIGURE 11;

FIGURE 13 is a circuit diagram of a phase-locked loop synchronizer;

GURE 14 is a bi-phase decoder using a phase-locked loop;

~TGURE 15 is a waveform diagram for the decoder of FIGURE 14;

FrG~RE 16 is a circuit diagram of a double density decoder for use in combination with the encoder of FIGURE 8;

FIGVRE 17 is a waveform diagram for the decoder of FIGURE 16;

FIGURE 18 is a circuit diagram for the timing unit of FIGURE l;

~-~ FIGURE 19 is a demul~iplexer; and ;, !
, 10 FrGURE 20 is a perspective drawing of a piano key data generating and actuating apparatus.
Some inventive features discussed herein are claimed in the afore-mentioned pa~ent applicati~0n No. 226,073 but are lncluded here for the sake ;;i, ` of a complete disclosure so that the invention claimed here~n may be readily comprehended.
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Looking to F~GURE 1, a s~stem 10 for recording and reproducing a spontaneously generated piano presentation is shown, System 10 is especially adapted for use in combination with a conventional piano ~not shown~ modified only to include key closure contacts forming switches 12 which are closed to produce data in digital binary form each time any given key is depressed. This ~ is more fully described with reference to ~rGURE 20, The piano further com-; prises a pedal switch 14 indicating the use of the "sustain" pedal and a binary source 16 of expression signals created incident to the playing of a musical presentatlon on the piano in the conventlonal fashion. Sources 12, 14 and 16 are all useable by a player in the course of playing a musical presentation to gen-erate input signals which occur in various combinations according to a sequence, the timing of which is determined by the player. The combinations of signals include single key depression signals as single notes are played in ; , ~ - 5 ~ ~)S5659 :
the course of a musical presentat~on, and simultaneous com~inations of key depres-sion signals as chords or other note combinations are struck during the musical performance.
The system 10 comprises a multiplexer 20 the function of which is to establish scan frames of a predetermined ser~al ~it length ~in this case 128 bits in length) and to serialize the parallel input data from the input data sources 12, 14 and 16 within the scan frames; i.e. the multiplexer 2Q lines up the par-allel input data from all of the sources in a,~predetermined numbered sequence of one hundred twenty-eight data cells or bits asrbest shown in FIGURE 2` The data format which is selected includes the allocation of 8 bits for a sync word, 72 bits for piano keyboard switches 12, 1 bit for sustained data, 12 bits for expression data, 12 bits for data to drive a CRT displa~ for words, musical notes, etc.J and 15 bits for auxiliary functions such as rh~thm accompaniments and other miscellaneous operations.
.- The serialized data from multiplexer 20 is in a code format known as non-return to zero (NRZ) wherein a positive transition between binar~ signal levels represents a "1" and negat~ve transitions represents binary "0". Those ~ familiar with data and coding principles will recognize that the NRZ code is ; not inherentl~ self-clocking since a long string of bits of the same binary value '~ 20 is characterized b~ the absence of an~ transitions at all. This can create several problems including ~1) that the frequency responses of the receiver network must go from D.C. to the bit rate and, ~2) a separate clock signal must ,. . .
~, be encoded or recorded on a second recorder track so as to synchronize the read-~"
out operation with the actual location of data cells in the data train or scan frame. On the other hand the NRZ code does have the advantage of high data ~: density and, therefore, it is desirable to preserve the high density advantage to the extent possible. The encoder 26 preferabl~ takes such form as hereinafter ' described ~ith reference to PrGURE 8 as will combine clock information from timing ~.,' ,~ , 6 k i ~`

~85~S9 unit 22 with the ser~alized ~RZ data fr~m multiplexer 20 and present to storage medium 2~ the data in such code or format as to produce a guaranteed transitlon between the binary signal levels for most or all of the data cells in each scan frame. This code format has a~ least two advantages: ~1) the data stream is - self-clocking and, thus, requires no separate clock signal on a second recording medium channel, and ~2) the data in the scan frame is contained in the transitions rather than in the amplitude or level of the signal. The result of ~hese two advantages is the realization of high data decoding accuracy, high density data storage and the substantial reduction in performance requirements of the recording equipment employed. The storage medium 24 preferably takes the form of a stand-ard single~track magnetic tape recorder-player of the type using standard reel-to-reel ~ape cassettes. Other recording devices may, however, be emplo~ed. Power suppl~ 28 provides electrical excitation to all of the system elements in FIGURE
1 requiring same as will be apparent to those skilled in the art.
FIGURE 1 further discloses the means for retrieving the stored data from medium 24 and demultiplexing the data for use in reproducing the musical pro-duction represented by the data from input sources 12, 14, and 16, as previously described The reproduction system comprises a conventional read head arrange-ment for presenting the data defining the musical production and the auxiliary functions along with the inherent clocking data to a receiver 30, a decoder 32, and synchronizer 34 which extracts the clock signal from the scan frames. ~he reconstructed clock is applied to the decoder 32 as shown to restore bi-phase " ;~
data to NRZ form for application to the demultiplexer 36. The demultiplexer .....
36 perorms an operation whlch is substantially the reverse as the multiplexer 20; i~e., it reorganizes the serialized data from each scan frame into parallel form for presentation via output bus 38 to the key drive solenoids of a piano or organ or other musical instrumentality as may be employed. The expression ~; data is simultaneously applied to the power supply 28 by way of bus ~0 to modulate ~, ' 56S~

the amplitude o~ the dr~ve voltage ~ch ~s suppl~ed to t~e ke~ drive solenoids to accomplish the expression funct~on. As also shown in PIGURE 1, the recon-structed~clock signal from decoder 32 is applied to the timing unit 22 which synchronizes ~he demultiplex function. It will also ~e observed that the eight-bit sync signal in the scan frame of PIGURE 2 is extracted during ~he demulti-plex function and applied to the tlm~ng unit 22 to restart or synchronize the strobe clock for each scan frame to ensure that the read strobe signal does not drift outside of the data cell boundaries with the result of signal degradation and possibl~ a loss of data cell sync.
PIGURE 1 also sho~s output bus 42 from the demultiplexer 37 for trans-m~tting the auxiliar~ drive signals to an auxiliary unit such as a CRT display for word pictorialization, color display or to perf~rm some other auxiliary function such as controlling house lights to a desired level o~ brightness, operating a rh~thm unitJ operating other accessories and appliances, any of these functions either ~eing related or unrelated to the reproduction 6f music.
Expression control ma~ be provided in various ways. One expression control s~stem is shown in PrGURE 3. In this s~stem transclucers 50 are mounted to sense the intensit~ with which the ke~s are struck. This information is serialized by wa~ of N-channel multiplexer 52 and amplified at 54. The amplified : ..
signal is applied to a power detector 56 which ma~ be a simple threshold detec-;.~ tor having several levels of discrimination. The output of detector 56 is applied t~ to the analog digital converter 58 which generates a digital signal suitable ,-~ for recording within the system of PIGURE 1.
The transducers 50 ma~ take any o several Eorms, or example, they ma~ be microphones, simple accelerometers, or magnetic pickups. Whatever the form, the transducers are voltage generating devices which produce signals that are then multiplexed at 52 to form a single analog voltage stream. The analog-to-digital converter 58 does, o course, operate under the control of the clock '`~

~ - 8 -signal from the timing unit 22 since each o the transduce~s 1 through N must be sampled at the appropr~ate t~me, ~ n Figures 4~19 many~ of tl~e elements otherwise identified by reference characters also contain numbers which are indicative of industrially standard-ized integrated circuits, suc~ circuits be~ng commercially available and hence no specific description will be given herein. These circuits are available as pre-packaged devices from various manufacturers including Texas Instruments, Inc., Signetics, Fairchild, and Harris. According to catalogs published by or or these companies in 1972 and 1973, the follo~ing specifically identified integrated circuit units are available from the indicated companies. Signetics:
NE565 ~phase locked loop~; F~irchild: 741~71OJ 37002, 7400, 7404, 74193, 74150, 74151, 7486, 7474, 74121, 7420, 74192, and 74164.
FIGURE 4 illustrates an alternative system for expression control in thè p~ano and comprises four microphone sensors 60 spaced at uniorm intervals b~efiind the keyboard. The microphone outputs are serially multiplexed together at 62, this unit preferably taking the foTm of a Fairchild 37022 dc unit, a four-bit analog multiplexer. The serial output from the multiplexer 62 is amplified at 64 and applied to a low-pass filter 66. The filtered output is then digitized by~ means o the comparator 68, counter 70, and ladder network 72.
T~e ladder network is a well known device, easily constructed using discrete components or available as a pre-packaged circuit device from Angstrohm Pre-;"
cision,.Inc. as part of their DIP series of binary circuits. The frequencyresponse to the low-pass filter is centered about approximately 30 Hz. The out-put of the low-pass filters 66 is conver~ed to digital orm and the least sign-ificant bit of the analog digital converter switches back and forth from a "1" to a "0" and the three most significant bits are used as an output to give as much as eight levels of control over the intensity or volume by varying voltage to solenoids that strike the keys in the respective quarter of the piano ; . .

~0~5659 keyboard. ~he three ~ts o$ data ma~ ~e added to the data ~ormat, stored or transmitted, and reconverted Back ~nto parallel informfatlon Af~er being con~
- verted from digital to analog form, the voltage at which the solenoid is operated is adjusted in response to the analog slgnal, thus, to control the force with which the ke~ is struck.
Other forms of expression control including manual expression control can, of course, be employed.
PIGURE 5 illustrates the details of a typical implementation for the multiplexer 20 of FICURE 1. Multiplexer 20 includes a seven-bit counter pro-viding 27 combinations for the 128 multiplex function. ~he circuit of ~IGURE
5 is a two-level multiplexing scheme, the first level of wh~ch assembles the data into eight parts of sixteen bits each and the second level of wh~ch further assembles the ei.ght parts into one scan frame having 128 or more data units, The first le~el utilizes our bits from timing unit 22 to accomplish a sixteen-` bit multiplex function Tn circuit 80, for example, the our bits of timing inf~rmation and the sixteen bits of input data generate a serial output from '.'' the sixteen input information bits, bit 1 being the first out and bi~t 16 being the last out.~Running parallel with this multiplexer unit are seven other multiplexers of substantiall~ identical construction generating output bits at the same rate and controlled by the same four input timing bits. The out-puts of these eight multiplexer units are, however, fed into the eight-bit .~ multiplexer 82 the timing of which i5 controlled b~ the subsequent three timing .
j bits from unit 22 shown in FIGURE l; i.e., the least significant bits of the .: timing sequence. The output of multiplexer unit 82 samples each of the other ``; eight multiplexers once for each of their output bit times, thus, generating ~, the 128 bit serial NRZ data stream with bit 1 of multiplexer AI out first and :j~
bit 16 o multiplexer 80g coming out last.

The sync word illustrated as the beginning of the scan frame in FIGURE

., - 1 0 -~ 1~)8S6S9 ~ may comprise, for example, a serles o~ e~ght ones ~l's), thus, to present a distinc~ data form which is not likel~ to be generated during random musical data produc~ion and which can be distributed and recognized as a sync word by the synchronizer 34. The sync word can be hard wlred with the first eight bits wired to zero if all ones (l's) are required for the sync word. The SN 74150 suggested for units 80 produces an inversion between input and output; therefore, all zeros would be wired for an all one sync word. The switches 12 from the piano keyboard as well as for the sync word are wired directly to the inputs of the multiplexer units 80 and, when the ke~ is closed, the switch grounds to common providing an input signal The output data is, thus, inverted to convert the ground or binar~ zero to a binar~ one~
In reproducing music, the sample rate is of substantial significance in order to ensure the complicated compositions as well as the auxiliary func-tions can be suitably reproduced using conventional recording equipment~ The sample period ~or each data cell is about 250 microseconds ~or both multiplexers ~; to ensure that the sample rate is much faster than the pla~ing speed. Thus,~ a sample time is negllgible compared to the time a ke~ is actually depressed in ,. 1 , ~ normal operation of a piano or an organ or another instrument. Any key switches . :,, .
that close in the middle of a bit time or other erratic operation of the keys wou,~d be undetectable because the sample rate is very high.
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Referring now to ~IGURE 6, there is shown a bi-phase encoder for .
implementation o~unit 26 in PIGURE 1. Encoder 26 is responsive to the NRZ data from the multiplexer 20 to produce a code which has the self-clocking feature and which exhibits no signiicant dc component. The basic bi-phase level code ~ in that zero information is the inverted clock and the one information is a true i ; clock. This code is a simple exclusive/~R of the NRZ data and the inverted clock information. rt is provided b~ the gates 90 and 92, implemented and con~

nected as shown. rn the timing diagram of ~I~URE 7, the bi-phase data is the S~i5~9 clock for binar~ ones ~ J and t~e ~nverted cloc~ ~or b~nary zeros ~O's). The maximum time ~e~ween transit~ons ~n the da~ia is the bit t~me. There is always a transitZon in the data in the middle o~ the bit; lt is a transition from high to low to represent a ~ and from low to high to represent "O". In utilizing the exclusive/OR gates 90 and 92 ~o generate the bi-phase data, spikes or ~rans-ients generated in the data which are of high frequenc~ or narrow pulse width are filtered out b~ the fairly low ~requency response tape recorder system.
Thus, the bi-phase data encoder of FIG~RES 6 and 7 is especially well adapted for tape recorder use 6ut ma~ call for some alternative approaches for other transmission medias such as radio or hardwire transmission.
Where correct data phase is a requirement of the storage or transmis-sion s~stem and the s~stem has good signal~to~noise ratiosJ a double-densit~
encoding scheme ma~ be employed using the implementation of ~IGUR~ 8. This results in a code format as represented in ~IGURE 9. The double-density code of PIGURE 9 has a transition in the middle of a one and a transition at the end ~;
of zero. However, when a single zero with a one on either side occurs, there is no transition at all. To generate the double-densit~ code, a bi-p~ase level .~ code is generated utilizing a clock and NRZ data as applied to exclusive/~R
~ i gate 96. The output of gate 96 is stored in a buffer flip-flop 98 to eliminate ;, 20 voltage spikes. The "not" output of the fllp-flop is applied to the clock input of flip-flop unit 100 which toggles the flip-flop on the negative edges.
i The flip-flop, thus, generates a double~densit~ code which does not require the the phase of the code be maintained ~y the storage or transmission medium 24.
The bandwidth may be half of the bandwidth required for the bi-phase data. The double-density code does enhibit some dc component and requires randomess of the data or an offset due to the dc component may be generated. Other code formats including return to zero ~RZ) can, of courseJ be employed. This may be of a distinct advantage where the storage or transmission medium 24 requires the clock - . . : . -, :-............. :, ,, . .. , : . . -: . : .-.

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1~85659 as well as the data; for example, the usc of a telephone line transmission means required clock and NRZ data but ot~er media may require RZ data Receiver 30 may take any of several forms, one orm being illus~rated in F~GURE 10. The input to rece~ver 10 is ac coupled from the tape read head to a zero crossing detec~or comprising transistor 102. A resistor Rl which loads the input to the correct load, R2 or R3 bias the transistor 102 to zero crossing.
Capacitor Cl is a coupling capacitor. Capacitor C2 is a low-pass~filtered cap- ;
acitor to filter out noise. Resistor R4 is purely a load for the transistor 102 and the output is the restored data in the original format. Most tape recorders and other transmission systems may~employ the receiver of ~IGURE lO.
A bi-phase decoder implementation unlt for unit 32 is shown in FrGURES
11 and 12. The hi-phase decoder 32 of FrGURE ll utilizes a one-~shot which extracts transitions from the bi-phase data by delaying the bi-phase data through :, the transitor Zl with Rl and Cl as the delay network. Circuit 32 then exclusive/
"ORts" the output of Ql which ls inverted and delayed bi-phase data with the input bi-phase data. The output of the exclusive/OR 110 is a positive going spike on the edges of the incoming data and trigger a one-shot unit 112 with : the timing set by R3 and C2. The output of the one-shot 112 is a three-quarter bit period clock; the first time the one-shot sees a transition from one to zero or a zero to one in the bi-phase data, the one-shot will synchronize with t~e.incoming data train. ~his clock is then utilized to clock into the data flip-flop 114 the inverted bi-phase data. The output of the data flip-flop 114 is the reconstructive NRZ data and the output of 112 is the clock that is utilized in the demultiplexing oE the data, PrGURE 13 shows a phase-lock loop synchronizer suitable for the implementation of unit 34 of FrGURE 1. Where the ~ata storage and transmission unit has a low signàl-to-naise ratio or where tape speed varies or other factors result in a degradation of the data, the clock information may be regenerated ~

5i655~

b~ the utllization of a phase~locked loop of the type shown in ~GURE 13. In either a bi-phase or double densit~ code, a clock signal related to two times the clock frequency is obtained from the data b~ extracting the edges of the transition of the data utilizing a dela~ network RlC], transitor 116, and exclusive/OR gate 118, a flip-flop 119, and a one~shot unit 120. The output of the one-shot is approximatel~ one-quarter the bit time of the clock rate use, This pulse is fed to a phase-locked loop including transistor 121 that generates an output clock which is at twice the bit rate. The decode scheme can then divide the clock ~r ~wo and phase it correctl~ with the data. In the ;~ .

circuit of FIGURE 13, the output of the one~shot is fed to the phase-locked loop utilizing a Signetics NE 565 or equivalent which is running at a center , frequency of two times the bit rate. The Signetics NE565 is ~i self-contained adaptable filter and demodulator for the frequency range O.OOlHz to 500 KHz.
The circuit comprises a voltage controlled oscillator of exceptional stability i~ l and linearity, a phase comparator, an amplifier and a low-pass filter as is $
, more fully described in the Signétics Linear Integrated Circuit catalog, ~ pages 6-72 through 6 76. The VCO output is allowed to track over a large range ; of variations in input frequencr and flutter or track through noise. The out-: ,:
put of the phase-locked loop is buffered providing two times the bit rate clock.
: 20 The phase-locked loop is a simple circuit utilizing standard, integrated circuits.
Looking to ~IGURE 14J a bi-phase decoder using a phase-locked loop is illustrated. The 2X clock rom the phase-locked loop is utilized to shift the bi-phase data into data flip-flops 132 and 134 operating as a shift register to store two half bits in a shift register. Upon obtaining ones in both flip-flops or zeros in both flip-flops and decoding this condition along with a clock, an output flip-flop 136J 138 is cleared to phase the clock with the in-coming data. In the circuit shown in ~IGURE 14, a zero-to-one transition in the data syncs the clock flip-flops 132, 134 to the correct phase of the data. The .. - : .,~, ' ' ': : ' 2:`: ' ' ~OSS6$9 bi-phase data is loaded into the data ~lip-flop 136, 138 utilizing the bit rate clock flip-flop and is then decoded with the timing diagram, shown in FIGURE 15, to provide the NRZ data.
A double-densit~ decoder utilizing the phase-locked loop as a clock is shown in FIGUR~ 16. The double-densit~ input data is shifted into a four-bit shift register utilizing data flip-flops 150, 152, 154, and 156. The output from these four data flip-flops is decoded to s~nc the clock and to set the output data to zero~ From the timing diagram of FIGUR~ 17, it is apparent that when all four data flip-flops have ones or all four data flip-flops have zeros, the clock and the data should both be zero at this time. By decoding that state, all ones or all zeros in all four flip-flops clearing khe clock flip-flop and clearing the data flip-flop are properl~ phased together. The output data flip-flop is toggled to reconstruct the NRZ data.
FIGURE 18 illustrates suitable implementation for the timing unit 22 of FIGURE 1. The timing unit in ~oth the multiplexed modes and the demultiplexed modes utilizes the same counters. Whether the s~stem is operating in a multi-plexed mode or a demultiplexed mode can be determined in several wa~s. The ideal way is to have a command input from the tape recorder 24. Commands to operate the clock to be used in the timing network 22 ma~ be obtained from timing reference oscillator 160 by command or sensed from incoming data. This clock whether obtained from oscillator b~ enabling gates 162 and 164 or from data via gate 166, is then fed via gate 168 to a synchronous counter 170, 172 implemented with two SN 74 192's as a one~hundred twenty-eight pulse per count cycle. The sync that synchronizes the cotmter during a receive mode comes from the demultiplexer which senses the sync word. The sync pulse is then counted and after obtaining two sync pulses in a row, the inhibit signal is released to allow the output data from the multiplexer to be utilized. The sync counter ~-174, 176 is implemented using two sync SN 74 74 data flip-flops. The clock from : . : ~: : . ~ . . . .

~3S659 an internal oscillator ~ch oscillates t~e bit rate clock or the clock from the receiver synchronlzer is gated through the gates using an SN 74 00, also marked 178~ with the command to select the required clock ~see FIGURE 19).
Looking to ~rGUR~ 19, a demultiplexer 37 is shown. In ~IGURE 19 the seven tlming bits from tlming unit 22 control an output demul~iplexer consistingof one eight-channel demultiplexer 180 feeding eight sixteen-channel demulti-plexers 182 for a two-stage demultiplex operation. The output from the demul~i-plexer exists for only two-hundred fifty~microseconds which is not sufficient ~` to drive a solenoid and, accordingly, a pulse stretcher 184 is required to extend the output to the required thirt~ milliseconds. A suitable pulse stret-cher is disclosed in Figure 9B of the patent to Wheelwright 3771406; see ref--. erence character 290 and the description in column 6 of the paten~ beginning at line 33. Other devices such as one-shots may~ also be employed. The stret-ched pulse is applied to drive switch 186. The multiplexer of FTGURE 19 employs :~` no storage unit. A demultiplexer utilizing storage for time bits may also be ~ employed.
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PrGURE 20 illustrates apparatus which is required in some orm in the piano itself. Ke~ 188 operates through conventional mechanism 190 to move , hammer 192 to strike str~ng 194. When key 188 is manually struck and depressed, nonconductive trip 196 pushes spring wire 198 into contact with conductor 202, making an electrical circuit from excitation plate 200 to conductor 202 which isconnected to the multiplexer 20. A similar arrangement is provided or each key. For playback, solenoid 204 may be energized with a voltage pulse to raise plunger head 206 to pivot key 188 just as if lt were struck manually.
The auxiliary and video signals from demultiplexer 37 may be employed for a variety of operations including those which are not musical in character, A video word display~may ~e provided by means o a CRT device of the type des-cri6ed in the Radio-~lectronics article published in 1973 by Gerusback Publica-S;6S9 tions of New York and entitled "TV Typewriter~ ha~ device comprlses a CRT
~television) set 300 which can Be programmèd via a typewriter to display words at a selected rate. To emplo~ such a system in com~ination with the player piano system described herein, a first operator types words in synchronism with ~, the simultaneous rendition o~ a musical memBer ~y a second operator and all `~ information is input to the encoder 26 via the multiplexer 20. The unit 80g ~,"`, of P~GURE 5 may be allocated to the TV typewriter input. On playba~k, the ., channel 182f of demultiplexer 36 may be allocated exclusively ko the TV set ~', control. ~' , 10 It will be understood that the foregoing description is merely . illustratiYe of the invention and is not ~e construed in a limiting sense.

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Claims

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A magnetic tape for use with a piano having a magnetic tape reading unit and selectively actuatable key note depression devices controlled by said magnetic tape reading unit, said magnetic tape containing a serial arrangement of data cells physically arranged in a single track of said tape, said serial arrangement of data cells being sub-divided into a sequential series of data cell frames of fixed length, the improvement wherein the musical data in each said data cell frame is independent of the amplitude of magnetization of said tape and is solely in the form of abrupt magnetic flux transitions representing logical combinations of clock data and key note actuation data, there being at least one abrupt magnetic flux transition per data cell to constitute said clock data and adapted to control the translation of each frame of serially arranged data cells to parallel data and apply the key note signals in each data cell frame simultaneously to said selectively actuatable key note depression devices to thereby control the recreation of a musical production on said piano.