CA1100196A - Circuits logiques ternaires a circuits integres cmos - Google Patents
Circuits logiques ternaires a circuits integres cmosInfo
- Publication number
- CA1100196A CA1100196A CA277,906A CA277906A CA1100196A CA 1100196 A CA1100196 A CA 1100196A CA 277906 A CA277906 A CA 277906A CA 1100196 A CA1100196 A CA 1100196A
- Authority
- CA
- Canada
- Prior art keywords
- ternary
- type
- input
- tri
- valued
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000000295 complement effect Effects 0.000 claims description 18
- 239000004065 semiconductor Substances 0.000 claims description 16
- 229910044991 metal oxide Inorganic materials 0.000 claims description 15
- 150000004706 metal oxides Chemical class 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 5
- 239000011159 matrix material Substances 0.000 abstract description 4
- 238000012986 modification Methods 0.000 abstract description 2
- 230000004048 modification Effects 0.000 abstract description 2
- 238000010276 construction Methods 0.000 abstract 2
- 210000004027 cell Anatomy 0.000 description 9
- 230000001351 cycling effect Effects 0.000 description 9
- 238000013461 design Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 6
- 230000008859 change Effects 0.000 description 3
- 210000000352 storage cell Anatomy 0.000 description 3
- 240000008881 Oenanthe javanica Species 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 230000002146 bilateral effect Effects 0.000 description 2
- 238000006880 cross-coupling reaction Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000003780 insertion Methods 0.000 description 2
- 230000037431 insertion Effects 0.000 description 2
- 244000187656 Eucalyptus cornuta Species 0.000 description 1
- 241000029470 Mastersia Species 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000004886 process control Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000001172 regenerating effect Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K29/00—Pulse counters comprising multi-stable elements, e.g. for ternary scale, for decimal scale; Analogous frequency dividers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09425—Multistate logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/038—Multistable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/3568—Multistable circuits
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA357,109A CA1109128A (fr) | 1977-05-06 | 1980-07-25 | Circuits logiques ternaires avec circuits integres cmos |
| CA357,108A CA1109127A (fr) | 1977-05-06 | 1980-07-25 | Circuits logiques ternaires avec circuits integres cmos |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB2066876A GB1563821A (en) | 1976-05-19 | 1976-05-19 | Ternary logic circuits with cmos devices |
| GB20668/76 | 1976-05-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1100196A true CA1100196A (fr) | 1981-04-28 |
Family
ID=10149694
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA277,906A Expired CA1100196A (fr) | 1976-05-19 | 1977-05-06 | Circuits logiques ternaires a circuits integres cmos |
Country Status (2)
| Country | Link |
|---|---|
| CA (1) | CA1100196A (fr) |
| GB (1) | GB1563821A (fr) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4518875A (en) * | 1982-06-04 | 1985-05-21 | Aytac Haluk M | Three-level MOS logic circuit |
| RU2281605C2 (ru) * | 2004-11-01 | 2006-08-10 | Николай Дмитриевич Попов | Логическое устройство "и" |
| RU2287895C2 (ru) * | 2004-11-01 | 2006-11-20 | Николай Дмитриевич Попов | Логическое устройство "отрицание" (варианты) |
-
1976
- 1976-05-19 GB GB2066876A patent/GB1563821A/en not_active Expired
-
1977
- 1977-05-06 CA CA277,906A patent/CA1100196A/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| GB1563821A (en) | 1980-04-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |