CA1132265A - Appareil a priorites alternees a memoire a acces direct - Google Patents

Appareil a priorites alternees a memoire a acces direct

Info

Publication number
CA1132265A
CA1132265A CA337,335A CA337335A CA1132265A CA 1132265 A CA1132265 A CA 1132265A CA 337335 A CA337335 A CA 337335A CA 1132265 A CA1132265 A CA 1132265A
Authority
CA
Canada
Prior art keywords
dma
peripheral
signals
cycles
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA337,335A
Other languages
English (en)
Inventor
Minoru Inoshita
Gerald N. Winfrey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Inc filed Critical Honeywell Information Systems Inc
Application granted granted Critical
Publication of CA1132265A publication Critical patent/CA1132265A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/30—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
CA337,335A 1978-12-26 1979-10-10 Appareil a priorites alternees a memoire a acces direct Expired CA1132265A (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US97319678A 1978-12-26 1978-12-26
US973,196 1978-12-26

Publications (1)

Publication Number Publication Date
CA1132265A true CA1132265A (fr) 1982-09-21

Family

ID=25520615

Family Applications (1)

Application Number Title Priority Date Filing Date
CA337,335A Expired CA1132265A (fr) 1978-12-26 1979-10-10 Appareil a priorites alternees a memoire a acces direct

Country Status (7)

Country Link
JP (1) JPS5588121A (fr)
AU (1) AU534761B2 (fr)
CA (1) CA1132265A (fr)
DE (1) DE2951055A1 (fr)
FR (1) FR2445556B1 (fr)
GB (1) GB2039105B (fr)
YU (1) YU40587B (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1266524A (fr) 1983-08-30 1990-03-06 Shinobu Arimoto Systeme de traitement d'images
US5241661A (en) * 1987-03-27 1993-08-31 International Business Machines Corporation DMA access arbitration device in which CPU can arbitrate on behalf of attachment having no arbiter
US4901234A (en) * 1987-03-27 1990-02-13 International Business Machines Corporation Computer system having programmable DMA control
JP2550496B2 (ja) * 1989-03-30 1996-11-06 三菱電機株式会社 Ｄｍａコントローラ
RU2109327C1 (ru) * 1996-08-19 1998-04-20 Тульский государственный университет Многоканальное устройство приоритета

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL154023B (nl) * 1969-02-01 1977-07-15 Philips Nv Prioriteitscircuit.
US3553656A (en) * 1969-06-03 1971-01-05 Gen Electric Selector for the dynamic assignment of priority on a periodic basis
JPS5147298B2 (fr) * 1971-08-30 1976-12-14
US3961312A (en) * 1974-07-15 1976-06-01 International Business Machines Corporation Cycle interleaving during burst mode operation

Also Published As

Publication number Publication date
GB2039105B (en) 1983-02-16
YU316779A (en) 1982-06-30
AU534761B2 (en) 1984-02-16
FR2445556A1 (fr) 1980-07-25
JPS5588121A (en) 1980-07-03
FR2445556B1 (fr) 1988-03-18
DE2951055C2 (fr) 1990-08-30
DE2951055A1 (de) 1980-07-17
GB2039105A (en) 1980-07-30
AU5300679A (en) 1980-07-03
YU40587B (en) 1986-02-28
JPS636891B2 (fr) 1988-02-12

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Legal Events

Date Code Title Description
MKEX Expiry