CA1282124C - Processeur rapide de synchronisation de signaux d'horloge de donnees - Google Patents

Processeur rapide de synchronisation de signaux d'horloge de donnees

Info

Publication number
CA1282124C
CA1282124C CA000555841A CA555841A CA1282124C CA 1282124 C CA1282124 C CA 1282124C CA 000555841 A CA000555841 A CA 000555841A CA 555841 A CA555841 A CA 555841A CA 1282124 C CA1282124 C CA 1282124C
Authority
CA
Canada
Prior art keywords
clock
data
phase
optimum
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA000555841A
Other languages
English (en)
Inventor
Napoleon G. Avaneas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Grumman Corp
Original Assignee
Grumman Aerospace Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Grumman Aerospace Corp filed Critical Grumman Aerospace Corp
Application granted granted Critical
Publication of CA1282124C publication Critical patent/CA1282124C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
    • H04L7/0338—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals the correction of the phase error being performed by a feed forward loop
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
    • F02D—CONTROLLING COMBUSTION ENGINES
    • F02D41/00—Electrical control of supply of combustible mixture or its constituents
    • F02D41/22—Safety or indicating devices for abnormal conditions
    • F02D41/222—Safety or indicating devices for abnormal conditions relating to the failure of sensors or parameter detection devices
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
    • F02D—CONTROLLING COMBUSTION ENGINES
    • F02D41/00—Electrical control of supply of combustible mixture or its constituents
    • F02D41/24—Electrical control of supply of combustible mixture or its constituents characterised by the use of digital means
    • F02D41/26—Electrical control of supply of combustible mixture or its constituents characterised by the use of digital means using computer, e.g. microprocessor
    • F02D41/28—Interface circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T10/00—Road transport of goods or passengers
    • Y02T10/10—Internal combustion engine [ICE] based vehicles
    • Y02T10/40—Engine management systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Combustion & Propulsion (AREA)
  • Mechanical Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
CA000555841A 1987-01-05 1988-01-05 Processeur rapide de synchronisation de signaux d'horloge de donnees Expired - Fee Related CA1282124C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US50487A 1987-01-05 1987-01-05
US000,504 1987-01-05

Publications (1)

Publication Number Publication Date
CA1282124C true CA1282124C (fr) 1991-03-26

Family

ID=21691795

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000555841A Expired - Fee Related CA1282124C (fr) 1987-01-05 1988-01-05 Processeur rapide de synchronisation de signaux d'horloge de donnees

Country Status (4)

Country Link
EP (1) EP0299024A4 (fr)
JP (1) JPH01501752A (fr)
CA (1) CA1282124C (fr)
WO (1) WO1988005236A1 (fr)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0363513B1 (fr) * 1988-10-13 1994-02-16 Siemens Aktiengesellschaft Procedé et dispositif de réception d'un signal numérique binaire
FR2643524B1 (fr) * 1989-02-21 1991-04-19 Trt Telecom Radio Electr Procede et dispositif de synchronisation bit dans un recepteur de transmission de donnees numeriques
DE58908236D1 (de) * 1989-02-23 1994-09-29 Siemens Ag Verfahren und Anordnung zum Anpassen eines Taktes an ein plesiochrones Datensignal und zu dessen Abtakten mit dem angepassten Takt.
WO1991003895A1 (fr) * 1989-09-11 1991-03-21 Raynet Corporation Appareil de retablissement de rythme
US5022056A (en) * 1989-10-23 1991-06-04 National Semiconductor Corporation Method and structure for digital phase synchronization
FR2658015B1 (fr) * 1990-02-06 1994-07-29 Bull Sa Circuit verrouille en phase et multiplieur de frequence en resultant.
US6150855A (en) * 1990-02-06 2000-11-21 Bull, S.A. Phase-locked loop and resulting frequency multiplier
FR2664765B1 (fr) * 1990-07-11 2003-05-16 Bull Sa Dispositif de serialisation et de deserialisation de donnees et systeme de transmission numerique de donnees en serie en resultant.
FR2664769A1 (fr) * 1990-07-11 1992-01-17 Bull Sa Dispositif d'echantillonnage de donnees et systeme de transmission numerique de donnees en resultant.
EP0600111A1 (fr) * 1992-11-30 1994-06-08 Siemens Aktiengesellschaft Méthode et dispositif pour échantillonner un signal numérique
DE69332333T2 (de) * 1993-10-12 2003-05-15 Alcatel, Paris Synchronisierungsschaltung
KR0153952B1 (ko) * 1995-12-16 1998-11-16 양승택 고속 디지털 데이터 리타이밍 장치
WO1998004043A1 (fr) * 1996-07-23 1998-01-29 Honeywell Inc. Circuit de synchronisation numerique haute resolution
JP3109465B2 (ja) * 1997-12-04 2000-11-13 日本電気株式会社 ディジタルｐｌｌ回路及び信号再生方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3404232A (en) * 1964-12-01 1968-10-01 Bell Telephone Labor Inc Stabilized pulse regenerator
AU475452B2 (en) * 1972-03-13 1974-09-12 Whisson, H.J. Fabricated partitions
US3908084A (en) * 1974-10-07 1975-09-23 Bell Telephone Labor Inc High frequency character receiver
US3959601A (en) * 1975-06-27 1976-05-25 Ford Motor Company Variable rate clock signal recovery circuit
US4443766A (en) * 1976-06-15 1984-04-17 The United States Of America As Represented By The Secretary Of The Air Force Precision digital sampler
US4320525A (en) * 1979-10-29 1982-03-16 Burroughs Corporation Self synchronizing clock derivation circuit for double frequency encoded digital data
US4449119A (en) * 1981-12-14 1984-05-15 International Business Machines Corporation Self-clocking serial decoder
US4513427A (en) * 1982-08-30 1985-04-23 Xerox Corporation Data and clock recovery system for data communication controller
JPS59225640A (ja) * 1983-06-06 1984-12-18 Nitsuko Ltd クロツク位相同期方式
US4575860A (en) * 1984-03-12 1986-03-11 At&T Bell Laboratories Data clock recovery circuit

Also Published As

Publication number Publication date
JPH01501752A (ja) 1989-06-15
WO1988005236A1 (fr) 1988-07-14
EP0299024A4 (en) 1990-11-28
EP0299024A1 (fr) 1989-01-18

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Legal Events

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