CA1299247C - Radio device with controlled port and method of port control - Google Patents

Radio device with controlled port and method of port control

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Publication number
CA1299247C
CA1299247C CA000521442A CA521442A CA1299247C CA 1299247 C CA1299247 C CA 1299247C CA 000521442 A CA000521442 A CA 000521442A CA 521442 A CA521442 A CA 521442A CA 1299247 C CA1299247 C CA 1299247C
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CA
Canada
Prior art keywords
gate
radio
connector
information
memory means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CA000521442A
Other languages
French (fr)
Inventor
Jaime Andres Borras
Wayne Harry Browand
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of CA1299247C publication Critical patent/CA1299247C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

ABSTRACT
This radio includes a port for communication with the radio and can be used for programming its memory in order to set the radio personality. A
gate is provided for selectively enabling and disabling communication through the port. The gate is controlled by signals transmitted to the radio.
A memory retains the last transmitted control signal.

Description

1;~9~247 RADIO DEVICE WITH CONTRO~LED
PORT AND METHOD OF PORT CONTROL

BACXGROUND OF THE INVENTION
Thi8 invention relates gener~lly to electronic devices having progra~able memories and parti-cularly to electronic devices such as radios that have programming ports for programming the memories.
Technological advances in the electronic area, particularly in the area of digital devices including microprocessors and solid state memory devices such as Programmable Read Only Memories (PROM'S) and Electrical Erasable Programmable Read Only Memories (EEPROM'S), have lead to significant changes in the design of electronic devices such as two-way radios.
Early generation radios utilized crystals for channel elements with individual crystals for each desired frequency. Such crystals were slaved to a channel selector switch along with additional features such as subaudible tone encoders and decoders. Other personality features of the radio were either hard wired discrete type circuitry or modules that were installed in order to provide the desired personality feature of a particular radio.
The development of frequency synthesizers provided a major advance in radio design by elimi-nating the requirement of individual channel elements for each desired frequency of operation.

1;~99~7 By utilizing ~ memory to ma~ntain th~ necessary divisor infoxmation ~or u~e with the frequency synthe6izer, any desired frequency within the op~rating rang~ of the r~d~o can be achieved 6imply by changing the diYisor information in the ~emory.
Such m~ory devicea can also be used to ~tore designators of appropriate subaudible tone infor-mation for the individual chann21 as well as other information.
The use of microprocessors in radios has greatly enhanced the flexibility of the radio design. While many desired functions such as scanning, can be achieved without the use of microprocessors, the microprocessor 6implifies the radio design by allowing the manufacturer to build a single design and program the individual radios to have any or all of the possible av~ilable functions.
PROM's have been widely used a~ code plugs for containing channel information. The use of PROM's allows radios to be easily customized, that is, the particular desired channels of operation can be programmed into a PROM which is then inserted into a radio. A significant drawback to the use of PROM's is that, if it is desired to redefine the frequency information for the channels of operation, it is necessary to replace the PROM with a different PROM
containing the desired information. Advances in the EEPROM art have removed this limitation.
Since EEPROM's are electrically erasable, they can be erased and reprogrammed while in place in the radio. This development has permitted radios to be built with a great degree of flexibility, in that ~Z99Z~7 the rharacteri6tic3 of each individual radio can be reprogra~med with relative ease.
In order to provide for programming of 6uch radios, a connector or port i~ provid~d on the radio for programming purposes. Such a port, by allowing ready access for progra~ming, i8 useful to both the manufacturer and the user of the radio. The ease of programming does however present a problem, in that it is difficult to prevent unauthorized reprogram-ming of the device. For example, metropolitan police departments are sensitive to the theft of their radios. It is a particular concern to them that a stolen radio can be easily reprogrammed to operate on any other of their frequencies.
Consequently, it is desirable to provide means for preventing the unauthorized reprogramming of such radios.
SUMMARY OF THE INVENTION
This electronic device, which includes a memory and a programming port, provides means for disabling the programming port for preventinq reprogramming of the device. The device uses a coded signal, such as an RF signal transmitted to the device, for selec-tively enabling or disabling communication through the port.
In one aspect of the invention, a portable radio device includes a receiver means for receiving an RF signal, a programmable memory means for storing radio personality information, and connector means for providing an external connection for programming the memory means. A gate means operatively interconnects the connector means and the memory means. The control means is responsive 92~7 to received RF ~ignal~ for ~electively actuating the g~te me~ns of r for inhibiting progr~mming of the memory mean~ and selectively actuating the gate mean~ on for permitting programm~ng of the memory means through the connector means. In another aspect of the invention, the memory i8 an EEPROM.
The programmable memory means includes a control memory location.
In still another aspect of the i~vention, the control means includes a flip-flop having an input operatively connecting to the control memory location and having an output operatively connected to the gate means for controlling the gate means.
In yet another aspect of the invention, the flip-flip is a type D flip-flop. The gate and flip-flop are included on a single integrated circuit.
In one aspect of the invention, a micro-processor is operatively connected between the gate means and memory means. A communication bus is connected to the microprocessor. A gate means oper-atively connects the connector to the bus for communication with the microprocessor and memory means.
In another embodiment of the invention, an electronic device comprises a communication port and a communication bus. A gate means is operatively connected between the port and the bus. Control means are connected to the gate means for control-ling the gate means. An RF receiving means is oper-atively connected to the control means for actuatingthe control means in response to received RF fiignals for selectively allowing or inhibiting communication with the bus through the port.

lZ9`92~

In yet ~nother aspect of the invention, a method of controlling acce6s of a communication port to an electronic devics i8 provided. The ~ethod include~ th2 step o~ progra~ming the device to accept predetermined 8ignal6 indicative of the desired port control, transmitting predeter~ined signal6 indicative of th~ de~ired port control to the device, receiving the transmitted signal, setting a memory in response to the received signal, and actuating a data gate connected to the port in response to the setting of the memory to selectively permit or inhibit co~munication through the port to the device. In another aspect of the invention, the transmitted signal is an RF signal which is received prior to resetting the memory.

BRIEF DESCRIPTION OF THE INVENTION
FIG. 1 is a block diagram of a radio incorporating the invention.
FIG. 2 is a block diagram of the logic portion of the radio.
FIG. 3 is a block diagram of the logic portion of the radio showing the gate and bus structure.
FIG~ 4 is a block diagram of the radio personality register.
FIG., 5 is an electrical schematic diagram of the gate.
FIG. 6 is a flow chart of the personality register control.

DESCRIPTION OF THE PREFERRED EMBODIMENT
Referring now by characters of reference to the drawings and first to FIG. 1 a block diagram of a l~g~7 two way portable radlo, gen~rally indicated by 10, i8 shown. Radio 10 iB an FM tr~nsceiver, capable of both voice ~nd digital data communications, utilizing a ~ingle conversion, ~up~rheterodyne receiver.
An antenna 11 is switchabl~ by an antenna switch 12 for transmit and receiYe purposes. During reception, the switch 12 couples the antenna 11 to a two-pole filter 13, and RF amplifier 14, and a four-pole filter 15 which is coupled to a mixer 16.
A local oscillator input to the mixer 16 comes from a synthesizer, generally indicated by 17. The output of the mixer 16 goes to the IF filters, discriminator, and squelch stages, indicated by 20.
Audio signals are then amplified by amplifiers and driver 21, and the output is connected to the speaker 22.
Received digital signals are coupled by a coupling capacitor 23 to an amplifier stage ~4, to a second amplifier 25 via switch 26, and then selec-tively either to a low speed data filter 27 or directly to the high speed data filter 30 by switch 28. The filtered data is passed through a center slicer/limiter 31 and data decoding is accomplished utilizing a microprocessor 32.
The synthesizer 17 is utilized for both trans-mitting and receiving. It is modulated during transmission by data and/or voice signals. Data signals are generated by the microprocessor 32 and passed through the amplifier 25, through the appropriate high or low speed data filters 27 and 30, through an additional amplifier stage 29, and to the synthesizer 17.

lZ99X47 Whero volce tran5~i~ion i8 desiredO a micro-phono 33 is coupled through ~n in~tantaneous deviation control (IDC) 38 through the level setting voltage divider 34 and coupled to the amplifier 29 by capacitor 35 and r~sistor 36 through switch 37.
The voice and/or data i8 then applied to synthesizer 17 to modulate a reference oscillator 40, the output of which goes through a programmable divide by '~M"
divider 41, through a phase detector 42, filter 43, and a voltage control oscillator 44. In order to provide a wide band modulation respon~e for the transmission, the output from the amplifier 29 is also applied to a compensation network 47 and to the VCO 44.
To provide for phase lock of the synthesizer 17, the output of the filter 43 is passed through a prescaler 45, NA and Np counters 46 and to phase detector 42.
The output of VCO 44 is applied through a frequency doubler 50 to the injection filter switch 51 which routes the output either to the mixer 16 for receive purposes or to transmit buffer 52, power amplifier 53, and through the antenna switch 12 to the antenna 11.
It will be appreciated that various switching and contxol functions are accomplished by the micro-processor 32 through the control switching functions 55, and the peripheral interface and I/O expander 54 which is connected to the control radio fun^tions 56. While the control lines are not shown in FIG.
1, it will be understood that the switching functions 55 controls various switching functions.
Switches connected to the control switching lZ~9Z~7 functiu~ 55 include ~witch 2B that 6el cts either the high or the low ~peed data filters 27 and 30.
Switch 58 which is as5sciated with a~plifier 25 and control6 the gain of thi6 amplifier stage in order that a uniform ~ignal level can be presented regardless of whether the data is high or low speed data.
Switch 26, which is used to connect the reccived data to the filter stages or the data generated by the microproces60r to the filter stages, is also controlled by the switching functions 55. The control switching functions 55 also control the audio switch 37 and the time constant at the center slicer/limiter 31, corres-ponding to the reception of low or high speed data.
Various connections of the peripheral interface I/O
expander 54 are shown in FI~. 2.
Connected to the microprocessor 32 are several memory devices: a ROM 60 which contains program information for the microprocessor 32, a RAM fil for use by the microprocessor, and a EEPROM 62 which functions as the code plug for the radio 10 and contains the specific, customized radio information such as: frequency channels, subaudible and digital subaudible tone information for trunked radio systems, subfleet, private call, and call alert infor~ation, any otner desired controls, and other microprocessor controlled function information.
Referring now to FIG. 2, an SCI (Serial Communication Interface) bus 65 is connected to the microprocessor 32 for providing data, such as 1~992~7 control i~struction6, to the microproce6sor. A
rzdio keyboardJdisplay a~sembly 8~0Wn generally as 66, include6 A keyboard/display microco~puter 67 connected to the bus 65 through level control circuitry 68~ This microcomputer 6erves to inter face betwe~n a keypad 70, used to entering control instructionC~ and an LCD display 71, wh~ch can show various radio in~ormation such a6 mode of operation.
The keyboard/di~play microcomputer 67 has additional available I/O's, shown a~ a separat block ~esignated as 72, for other keyboard/display functions, such as providing and controlling the lighting for the LCD display 71.
A connector 74, constituting conn~ctor means, provides a communication port on the radio 10 in order to allow connection of external communication and/ox programming equipment to the radio. Communi-cation with the connector is provided through a gate 75, constituting gate means, to the SCI bus 65.
The SCI bus 65 includes buffer circuits 76 and 77 in the peripheral interface and I/O expander 54.
Also included in the peripheral interface and I/O
expander 54 is a radio personality regist~r 80, which along with its input, provides control means for controlling the gate 75. A one-of-eight decoder 81 is provided to individually select to read or write to the input or output ports within the peripheral interface and I/O expander 54. One of the decoder 81 outputs is used to clock the personality register 80 when the R/W signal i~ low for loading the register. Output latches 82, data input buffer 83, and programmable input and output latch 85 are provided for interfacing with the _ g _ control radio function5 56. An octal addre~s latch 84 i8 utilized for 6toring tho low order byte of the addres~ for memories 60-62. TX data and RX data both from and to the microproces~ox ~2 iB 6hown connacted to portions of the rereiver and tran~mitter circuit~ in block form in thi~ Fi~ure.
Re~erring now to FIG. 3, the SCI bus 65 is connected to the control gate 75 and the ke~pad~display asse~bly 66, through inverter 77A and N channel MOSFET device 90 which form buffer circuit 77 and the inverter 76A and N Channel MOSFET device 91 make up buffer circuit 76 which provides the CommunicatiQn path back to the microprocessor 32.
The open drain N channel MOSFET devices 90 and 91 are connected to resistors 92 and 93 respectively, for providing the necessary voltage level transitions.
The radio personality register 80 comprises a type D flip-flop having the data input responsive to information stored in EEPROM memory 62 through transparent latches 95 which are provided to assure proper signaling timing together with I/O buffers 96. The clock input of flip-flop 80 is provided through OR gate 97 which has one input connected to DEC 1 of one-of-eight decoder 81 through inverter 98 and the other input connected to the READ/WRITE line of microprocessor 32.
The radio personality information is stored in the EEPROM 62 and during initial powering up of the radio an initialization routine is run which causes the radio personality information to be loaded into the personality register 80. The type D flip-flop of re~ister 80 which controls the gate 75 is set 9~47 based upon the preprogrammed 6tatus in~ormation.
Various other outputs of the one-of-eight decoder 81 are usod for enabling the octal latche6 82A, 82B, 83 as well as the programmable i~p~/output latch B5.
Clocking of the octal address latch 84 i8 provided by an address 6trobe output of microprocessor 32.
FIG. 4 shows the radio ~ersonality latch 80 in greater detail. As illustrated, the personality latch 80 includes eight type D flip-flops. The individual flip-flop 100 i6 in the flip-flop that controls gate 75. Once the flip-flop 100 has been set, the status of communication with the connector 74 is determined until the flip-flop 100 is reset.
The other D flip-flops of register 80 can be used for various othsr personality information. For example, in the applicants preferred embodiment, flip-flop 99 is set to configure the programmable input/output latches 85 appropriately for a mobile or a portable radio application. Flip-flop 101 is set to provide a different timing sequence for the particular EEPROM 62 installed in the radio.
Flip-flops 102 and 103 are used for testing the integrated circuit on which the register 80 resides after manufacture. Flip-flops 104 through 106 are not utilized.
Referring now to FIG. 5, the particular structùre of the gate 75 is disclosed. The gate 75 includes a P-channel MOS FET 110 and an N-channel MOS FET 111 connected in parallel. The control input is connected directly to the gate of transistor 111 and through an inverter 112 to the gate of transistor 110. The transistors 110 and 111 are opposite type and by using the inverter 112 it ~Z9S~Z~7 will be under~tood that ba6ed on the control 5ignal to the gate 75 both of the transi6tors llO and 111 will be either off or on.
It i6 thought that the ~tructural feature~ and functional advantage~ of th~ radio device with a control port h~Ya beco~e fully apparent from the foregoing description of parts, but for completeness of disclosure the operation of the device will be briefly discussed.
It will be understood that while the gate means is shown as a single gate 75, since a single communication line is used in the preferred embod-iment that the gate means can include additional such gates where more than a single line is being controlled.
In operation, a single bit of information stored in a personality byte of information in the EEPROM 62 is used to determine the status of the gate 75. As indicated in FIG. 6, this bit of information i6 loaded with its associated byte into the personality register 80 when the radio is initialized when it is powered up. The type D
flip-flop 100 retains this bit of information and its output is connected to the input of gate 75 for controlling communications through gate 75. When the bit is set to inhibit communications to the gate 75, any co~munication including reprogramming of the radio through the connector 74 cannot be accomplished.
In order to reset the personality information in the EEPROM 62, an RF signal must be transmitted to the de~ice including particular address ~29~

informatisn th~t i8 recognlzed by the radio 10 as w~ an appropriat~ command in~truction to the microprocessor 32. The ~icroprocessor then clockfi the appropri~te byte of infor~ation into the peraonality r~gister 80 and the n~w output ~tate of flip-~lop 100 ~ supplied to the gate 75 to ~electively bias tran6i6tors 110 and 111 into either on or off stat~. The microprocessor also reprograms the EEPROM with the new bit corresponding to the desired gate 6tatus.
For progra~ming purposes, with gate 75 on digital signals can be communicated to microprocessor 32 to instruct the microprocessor to reprogram its code plug, EEPROM 62, with new information such as channel or feature control information.

We claim as our invention:

Claims (10)

1. A radio device comprising:

receiver means having an antenna for receiving a radio signal including digital information, programmable memory means for storing customized radio information, connector means for providing an external data connection to the radio device memory means, gate means operatively interconnecting the connector means and the memory means, and control means, responsive to the received radio signal for selectively actuating the gate means off to inhibit communication with the memory means and selectively actuating the gate means on for permitting communication with the memory means via the connector means, the programmable memory means including a bit of information for control of said gate means.
2. The radio device of Claim 1, wherein the programmable memory means comprises an electrically erasable read only memory.
3. The radio device of Claim 1, wherein a microprocessor is operatively connected between the gate means and the memory means.
4. The radio device of Claim 3, wherein a communication bus is connected to the microprocessor, and the gate means operatively connects the connector means to the bus for communication with the microprocessor and memory means.
5. A radio device comprising:

receiver means having an antenna for receiving a radio signal including digital information, programmable memory means for storing customized radio information, connector means for providing an external data connection to the radio device memory means, gate means operatively interconnecting the connector means and the memory means, and control means, responsive to the received radio signal for selectively actuating the gate means off to inhibit communication with the memory means and selectively actuating the gate means on for permitting communication with the memory means via the connector means, the programmable memory means including a bit of information for control of said gate means, and the control means including a flip-flop having an input operatively connected to the programmable memory means for loading and retaining said bit of information and having an output connected to the gate means for controlling the gate means.
6. A radio device comprising:

receiver means having an antenna for receiving a radio signal including digital information, programmable memory means for storing customized radio information, connector means for providing an external data connection to the radio device memory means, gate means operatively interconnecting the connector means and the memory means, and control means, responsive to the received radio signal for selectively actuating the gate means off to inhibit communication with the memory means and selectively actuating the gate means on for permitting communication with the memory means via the connector means, the programmable memory means including a bit of information for control of said gate means, and the control means including a "D" flip-flop having an input operatively connected to the programmable memory means for loading and retaining said bit of information and having an output connected to the gate means for controlling the gate means.
7. A radio device comprising:

receiver means having an antenna for receiving a radio signal including digital information, programmable memory means for storing customized radio information, connector means for providing an external data connection to the radio device memory means, gate means operatively interconnecting the connector means and the memory means, and control means, responsive to the received radio signal for selectively actuating the gate means off to inhibit communication with the memory means and selectively actuating the gate means on for permitting communication with the memory means via the connector means, the programmable memory means including a bit of information for control of said gate means, the control means including a "D" flip-flop having an input operatively connected to the programmable memory means for loading and retaining said bit of information and having an output connected to the gate means for controlling the gate means, and the gate means and flip-flop are included on a single integrated circuit.
8. A portable radio device comprising:

receiver for receiving a radio signal, an EEPROM for storing customized radio information, a connector for providing an external connection to the portable radio device for communication with the EEPROM, a gate operatively interconnecting the connector and the EEPROM, and a control means, responsive to the received RF signal for selectively actuating the gate off to inhibit communication with the EEPROM and selectively actuating the gate on to permit communication with the EEPROM via the connector, and the EEPROM including a bit of information for control of said gate.
9. The portable radio device of Claim 8, wherein a microprocessor operatively connects the connector to the EEPROM and a communication bus operatively connects the connector to the microprocessor with the gate connecting the bus and the connector.
10. A radio device comprising:

a data communication port providing an external connection to the radio device, a data communication bus, a gate means operatively connecting the data port to the bus, a control means operatively connected to the gate means for controlling the gate means, and a radio receiver including an antenna operatively connected to the control means for receiving a coded signal transmitted by radio and actuating the control means in response to the received coded signal for alternatively allowing or inhibiting communication with the bus through said ports, said bus providing a bit of information for control of said gate means.
CA000521442A 1985-11-15 1986-10-27 Radio device with controlled port and method of port control Expired - Lifetime CA1299247C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US79864385A 1985-11-15 1985-11-15
US798,643 1985-11-15

Publications (1)

Publication Number Publication Date
CA1299247C true CA1299247C (en) 1992-04-21

Family

ID=25173908

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000521442A Expired - Lifetime CA1299247C (en) 1985-11-15 1986-10-27 Radio device with controlled port and method of port control

Country Status (1)

Country Link
CA (1) CA1299247C (en)

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