CA2053941A1 - Systeme de generation d'instructions pour processeur d'instructions parallele et systeme a mecanisme de branchement au milieu d'une instruction composee - Google Patents
Systeme de generation d'instructions pour processeur d'instructions parallele et systeme a mecanisme de branchement au milieu d'une instruction composeeInfo
- Publication number
- CA2053941A1 CA2053941A1 CA 2053941 CA2053941A CA2053941A1 CA 2053941 A1 CA2053941 A1 CA 2053941A1 CA 2053941 CA2053941 CA 2053941 CA 2053941 A CA2053941 A CA 2053941A CA 2053941 A1 CA2053941 A1 CA 2053941A1
- Authority
- CA
- Canada
- Prior art keywords
- instruction
- compound
- instructions
- execution
- compound instruction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US677,685 | 1991-03-29 | ||
| US07/677,685 US5303356A (en) | 1990-05-04 | 1991-03-29 | System for issuing instructions for parallel execution subsequent to branch into a group of member instructions with compoundability in dictation tag |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2053941A1 true CA2053941A1 (fr) | 1992-09-30 |
Family
ID=24719721
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA 2053941 Abandoned CA2053941A1 (fr) | 1991-03-29 | 1991-10-22 | Systeme de generation d'instructions pour processeur d'instructions parallele et systeme a mecanisme de branchement au milieu d'une instruction composee |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA2053941A1 (fr) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110858238A (zh) * | 2018-08-08 | 2020-03-03 | 阿里巴巴集团控股有限公司 | 一种数据处理的方法和装置 |
| CN111860803A (zh) * | 2019-04-27 | 2020-10-30 | 中科寒武纪科技股份有限公司 | 分形计算装置、方法、集成电路及板卡 |
| US11841822B2 (en) | 2019-04-27 | 2023-12-12 | Cambricon Technologies Corporation Limited | Fractal calculating device and method, integrated circuit and board card |
-
1991
- 1991-10-22 CA CA 2053941 patent/CA2053941A1/fr not_active Abandoned
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110858238A (zh) * | 2018-08-08 | 2020-03-03 | 阿里巴巴集团控股有限公司 | 一种数据处理的方法和装置 |
| CN110858238B (zh) * | 2018-08-08 | 2023-08-22 | 阿里巴巴集团控股有限公司 | 一种数据处理的方法和装置 |
| CN111860803A (zh) * | 2019-04-27 | 2020-10-30 | 中科寒武纪科技股份有限公司 | 分形计算装置、方法、集成电路及板卡 |
| US11841822B2 (en) | 2019-04-27 | 2023-12-12 | Cambricon Technologies Corporation Limited | Fractal calculating device and method, integrated circuit and board card |
| US12026606B2 (en) | 2019-04-27 | 2024-07-02 | Cambricon Technologies Corporation Limited | Fractal calculating device and method, integrated circuit and board card |
| US12093811B2 (en) | 2019-04-27 | 2024-09-17 | Cambricon Technologies Corporation Limited | Fractal calculating device and method, integrated circuit and board card |
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| EP0825529A2 (fr) | Système servant à préparer des instructions pour un processeur parallèle d'instructions et système à mécanisme de branchement au milieu d'une instruction composée |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| FZDE | Dead |