CA2311392C - Procede et appareil pour controler l'acces a des donnees confidentielles - Google Patents

Procede et appareil pour controler l'acces a des donnees confidentielles Download PDF

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Publication number
CA2311392C
CA2311392C CA002311392A CA2311392A CA2311392C CA 2311392 C CA2311392 C CA 2311392C CA 002311392 A CA002311392 A CA 002311392A CA 2311392 A CA2311392 A CA 2311392A CA 2311392 C CA2311392 C CA 2311392C
Authority
CA
Canada
Prior art keywords
data
volatile memory
memory
versacrypt
confidential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA002311392A
Other languages
English (en)
Other versions
CA2311392A1 (fr
Inventor
Robert D. Cassagnol
Douglas M. Dillon
David S. Kloper
Sandra J. Weber
Brandon E. Bautz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T MVPD Group LLC
Original Assignee
Hughes Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Electronics Corp filed Critical Hughes Electronics Corp
Publication of CA2311392A1 publication Critical patent/CA2311392A1/fr
Application granted granted Critical
Publication of CA2311392C publication Critical patent/CA2311392C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60Protecting data
    • G06F21/62Protecting access to data via a platform, e.g. using keys or access control rules
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2211/00Indexing scheme relating to details of data-processing equipment not covered by groups G06F3/00 - G06F13/00
    • G06F2211/007Encryption, En-/decode, En-/decipher, En-/decypher, Scramble, (De-)compress

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Bioethics (AREA)
  • General Health & Medical Sciences (AREA)
  • Storage Device Security (AREA)

Abstract

L'invention concerne un procédé et un appareil pour contrôler l'accès à des données confidentielles. L'appareil selon l'invention comprend une mémoire non-volatile pour la mémorisation des données et un circuit logique pour contrôler l'accès aux données contenues dans la mémoire. Le circuit logique réalise l'accès sélectif à la mémoire en vue de déterminer si au moins une partie des données contenues dans la mémoire comprend des données confidentielles en procédant par analyse d'une propriété inhérente aux données auxquelles on a accès. Le procédé selon l'invention est caractérisé en ce qu'il comprend les étapes ci-après: définition d'une section prédéterminée de la mémoire programmable en tant que référentiel pour des données confidentielles; adressage de la section prédéterminée de la mémoire programmable; calcul d'un nombre de blocs de données dans la section prédéterminée ayant une caractéristique prédéterminée; comparaison du nombre calculé à une valeur seuil; et définition de la mémoire sous forme d'une mémoire comprenant des données confidentielles dans la section prédéterminée, si le nombre calculé présente une relation prédéterminée avec la valeur seuil.
CA002311392A 1998-09-25 1998-09-25 Procede et appareil pour controler l'acces a des donnees confidentielles Expired - Fee Related CA2311392C (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US1998/020122 WO2000019322A1 (fr) 1998-09-25 1998-09-25 Procede et appareil pour controler l'acces a des donnees confidentielles

Publications (2)

Publication Number Publication Date
CA2311392A1 CA2311392A1 (fr) 2000-04-06
CA2311392C true CA2311392C (fr) 2004-05-11

Family

ID=22267938

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002311392A Expired - Fee Related CA2311392C (fr) 1998-09-25 1998-09-25 Procede et appareil pour controler l'acces a des donnees confidentielles

Country Status (4)

Country Link
EP (1) EP1032879A1 (fr)
AU (1) AU750573B2 (fr)
CA (1) CA2311392C (fr)
WO (1) WO2000019322A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110602206B (zh) * 2019-09-12 2022-06-10 腾讯科技(深圳)有限公司 基于区块链的数据共享方法、装置及存储介质
CN112541186B (zh) * 2020-12-21 2022-03-18 中国电子科技集团公司第三十研究所 一种基于运动状态感知的密码抗失控系统及方法
CN115712432B (zh) * 2022-10-31 2026-03-10 北京控制工程研究所 一种面向cots平台的星载软件edac容错方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0818473B2 (ja) * 1985-07-31 1996-02-28 トッパン・ムーア株式会社 機密水準を設定できるicカード
US5251304A (en) * 1990-09-28 1993-10-05 Motorola, Inc. Integrated circuit microcontroller with on-chip memory and external bus interface and programmable mechanism for securing the contents of on-chip memory
KR100238070B1 (ko) * 1996-11-28 2000-01-15 윤종용 광디스크시스템의 트랙횡단신호발생장치

Also Published As

Publication number Publication date
AU750573B2 (en) 2002-07-25
CA2311392A1 (fr) 2000-04-06
AU9582298A (en) 2000-04-17
WO2000019322A1 (fr) 2000-04-06
EP1032879A1 (fr) 2000-09-06

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Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed