CH392704A - Verfahren zur Herstellung von mehrschichtigen Halbleiteranordnungen - Google Patents

Verfahren zur Herstellung von mehrschichtigen Halbleiteranordnungen

Info

Publication number
CH392704A
CH392704A CH137762A CH137762A CH392704A CH 392704 A CH392704 A CH 392704A CH 137762 A CH137762 A CH 137762A CH 137762 A CH137762 A CH 137762A CH 392704 A CH392704 A CH 392704A
Authority
CH
Switzerland
Prior art keywords
production
semiconductor devices
multilayer semiconductor
multilayer
devices
Prior art date
Application number
CH137762A
Other languages
English (en)
Inventor
Goetz Dipl-Phys V Bernuth
Jaentsch Ottomar Dr Dipl-Ing
Krockow Dieter
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH392704A publication Critical patent/CH392704A/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
    • H10W74/47—Encapsulations, e.g. protective coatings characterised by their materials comprising organic materials, e.g. plastics or resins
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
CH137762A 1961-03-29 1962-02-05 Verfahren zur Herstellung von mehrschichtigen Halbleiteranordnungen CH392704A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE1961S0073228 DE1182353C2 (de) 1961-03-29 1961-03-29 Verfahren zum Herstellen eines Halbleiter-bauelements, wie Halbleiterstromtor oder Flaechentransistor, mit einer hochohmigen n-Zone zwischen zwei p-Zonen im Halbleiter-koerper

Publications (1)

Publication Number Publication Date
CH392704A true CH392704A (de) 1965-05-31

Family

ID=7503754

Family Applications (1)

Application Number Title Priority Date Filing Date
CH137762A CH392704A (de) 1961-03-29 1962-02-05 Verfahren zur Herstellung von mehrschichtigen Halbleiteranordnungen

Country Status (5)

Country Link
US (1) US3316465A (de)
CH (1) CH392704A (de)
DE (1) DE1182353C2 (de)
GB (1) GB1007598A (de)
SE (1) SE323748B (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1274245B (de) * 1965-06-15 1968-08-01 Siemens Ag Halbleiter-Gleichrichterdiode fuer Starkstrom
US3453508A (en) * 1967-10-18 1969-07-01 Int Rectifier Corp Pinch-off shunt for controlled rectifiers
DE1816841A1 (de) * 1968-12-04 1970-07-02 Siemens Ag Verfahren zum Stabilisieren der Kennlinie eines Halbleiterbauelements
US3628106A (en) * 1969-05-05 1971-12-14 Gen Electric Passivated semiconductor device with protective peripheral junction portion
US4040874A (en) * 1975-08-04 1977-08-09 General Electric Company Semiconductor element having a polymeric protective coating and glass coating overlay
US4017340A (en) * 1975-08-04 1977-04-12 General Electric Company Semiconductor element having a polymeric protective coating and glass coating overlay
GB1563421A (en) * 1975-12-18 1980-03-26 Gen Electric Polyimide-siloxane copolymer protective coating for semiconductor devices
US6388203B1 (en) 1995-04-04 2002-05-14 Unitive International Limited Controlled-shaped solder reservoirs for increasing the volume of solder bumps, and structures formed thereby
EP0819318B1 (de) 1995-04-05 2003-05-14 Unitive International Limited Eine löthöckerstruktur für ein mikroelektronisches substrat
US6025767A (en) * 1996-08-05 2000-02-15 Mcnc Encapsulated micro-relay modules and methods of fabricating same
DE60108413T2 (de) * 2000-11-10 2005-06-02 Unitive Electronics, Inc. Verfahren zum positionieren von komponenten mit hilfe flüssiger antriebsmittel und strukturen hierfür
US6863209B2 (en) 2000-12-15 2005-03-08 Unitivie International Limited Low temperature methods of bonding components
US6960828B2 (en) * 2002-06-25 2005-11-01 Unitive International Limited Electronic structures including conductive shunt layers
US7531898B2 (en) * 2002-06-25 2009-05-12 Unitive International Limited Non-Circular via holes for bumping pads and related structures
US7547623B2 (en) * 2002-06-25 2009-06-16 Unitive International Limited Methods of forming lead free solder bumps
TWI225899B (en) * 2003-02-18 2005-01-01 Unitive Semiconductor Taiwan C Etching solution and method for manufacturing conductive bump using the etching solution to selectively remove barrier layer
US7049216B2 (en) * 2003-10-14 2006-05-23 Unitive International Limited Methods of providing solder structures for out plane connections
JP4885426B2 (ja) * 2004-03-12 2012-02-29 ルネサスエレクトロニクス株式会社 半導体記憶装置、半導体装置及びその製造方法
US7358174B2 (en) 2004-04-13 2008-04-15 Amkor Technology, Inc. Methods of forming solder bumps on exposed metal pads
US20060205170A1 (en) * 2005-03-09 2006-09-14 Rinne Glenn A Methods of forming self-healing metal-insulator-metal (MIM) structures and related devices
US7674701B2 (en) 2006-02-08 2010-03-09 Amkor Technology, Inc. Methods of forming metal layers using multi-layer lift-off patterns
US7932615B2 (en) * 2006-02-08 2011-04-26 Amkor Technology, Inc. Electronic devices including solder bumps on compliant dielectric layers

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3145328A (en) * 1957-04-29 1964-08-18 Raytheon Co Methods of preventing channel formation on semiconductive bodies
NL231410A (de) * 1958-09-16

Also Published As

Publication number Publication date
US3316465A (en) 1967-04-25
SE323748B (de) 1970-05-11
DE1182353C2 (de) 1973-01-11
GB1007598A (en) 1965-10-13
DE1182353B (de) 1964-11-26

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