CH451326A - Verfahren zum gegenseitigen elektrischen Isolieren verschiedener in einer integrierten oder monolithischen Halbleitervorrichtung zusammengefasster Schaltelemente - Google Patents

Verfahren zum gegenseitigen elektrischen Isolieren verschiedener in einer integrierten oder monolithischen Halbleitervorrichtung zusammengefasster Schaltelemente

Info

Publication number
CH451326A
CH451326A CH88067A CH88067A CH451326A CH 451326 A CH451326 A CH 451326A CH 88067 A CH88067 A CH 88067A CH 88067 A CH88067 A CH 88067A CH 451326 A CH451326 A CH 451326A
Authority
CH
Switzerland
Prior art keywords
integrated
semiconductor device
switching elements
electrical isolation
various switching
Prior art date
Application number
CH88067A
Other languages
English (en)
Inventor
George Kren John
Regh Joseph
Kenroku Seto David
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of CH451326A publication Critical patent/CH451326A/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/019—Manufacture or treatment of isolation regions comprising dielectric materials using epitaxial passivated integrated circuit [EPIC] processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/928—Front and rear surface processing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate
CH88067A 1966-01-12 1967-01-20 Verfahren zum gegenseitigen elektrischen Isolieren verschiedener in einer integrierten oder monolithischen Halbleitervorrichtung zusammengefasster Schaltelemente CH451326A (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US520245A US3357871A (en) 1966-01-12 1966-01-12 Method for fabricating integrated circuits
US522278A US3419956A (en) 1966-01-12 1966-01-21 Technique for obtaining isolated integrated circuits

Publications (1)

Publication Number Publication Date
CH451326A true CH451326A (de) 1968-05-15

Family

ID=27060085

Family Applications (2)

Application Number Title Priority Date Filing Date
CH38167A CH451325A (de) 1966-01-12 1967-01-01 Verfahren zum Herstellen integrierter Schaltungen mit durch eingebettete Trennfugen aus dielektrischem Material gegenseitig elektrisch isolierten Schaltelementen
CH88067A CH451326A (de) 1966-01-12 1967-01-20 Verfahren zum gegenseitigen elektrischen Isolieren verschiedener in einer integrierten oder monolithischen Halbleitervorrichtung zusammengefasster Schaltelemente

Family Applications Before (1)

Application Number Title Priority Date Filing Date
CH38167A CH451325A (de) 1966-01-12 1967-01-01 Verfahren zum Herstellen integrierter Schaltungen mit durch eingebettete Trennfugen aus dielektrischem Material gegenseitig elektrisch isolierten Schaltelementen

Country Status (8)

Country Link
US (2) US3357871A (de)
BE (2) BE691802A (de)
CH (2) CH451325A (de)
DE (2) DE1589918B2 (de)
FR (2) FR1509408A (de)
GB (2) GB1137577A (de)
NL (2) NL154062B (de)
SE (1) SE326504B (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5696402A (en) * 1965-09-28 1997-12-09 Li; Chou H. Integrated circuit device
US3440498A (en) * 1966-03-14 1969-04-22 Nat Semiconductor Corp Contacts for insulation isolated semiconductor integrated circuitry
US3471922A (en) * 1966-06-02 1969-10-14 Raytheon Co Monolithic integrated circuitry with dielectric isolated functional regions
US3575740A (en) * 1967-06-08 1971-04-20 Ibm Method of fabricating planar dielectric isolated integrated circuits
US3460007A (en) * 1967-07-03 1969-08-05 Rca Corp Semiconductor junction device
US3753803A (en) * 1968-12-06 1973-08-21 Hitachi Ltd Method of dividing semiconductor layer into a plurality of isolated regions
US3844858A (en) * 1968-12-31 1974-10-29 Texas Instruments Inc Process for controlling the thickness of a thin layer of semiconductor material and semiconductor substrate
US3755012A (en) * 1971-03-19 1973-08-28 Motorola Inc Controlled anisotropic etching process for fabricating dielectrically isolated field effect transistor
US3969749A (en) * 1974-04-01 1976-07-13 Texas Instruments Incorporated Substrate for dielectric isolated integrated circuit with V-etched depth grooves for lapping guide
US3928094A (en) * 1975-01-16 1975-12-23 Fairchild Camera Instr Co Method of aligning a wafer beneath a mask and system therefor and wafer having a unique alignment pattern
JPS5351970A (en) * 1976-10-21 1978-05-11 Toshiba Corp Manufacture for semiconductor substrate
US4502913A (en) * 1982-06-30 1985-03-05 International Business Machines Corporation Total dielectric isolation for integrated circuits
RU2146714C1 (ru) * 1998-12-22 2000-03-20 Центральный научно-исследовательский институт пленочных материалов и искусственной кожи Способ переработки кожевенных отходов в кожевенный порошок
US6927073B2 (en) * 2002-05-16 2005-08-09 Nova Research, Inc. Methods of fabricating magnetoresistive memory devices

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2967344A (en) * 1958-02-14 1961-01-10 Rca Corp Semiconductor devices
FR1217793A (fr) * 1958-12-09 1960-05-05 Perfectionnements à la fabrication des éléments semi-conducteurs
NL252131A (de) * 1959-06-30
US3179543A (en) * 1961-03-30 1965-04-20 Philips Corp Method of manufacturing plates having funnel-shaped cavities or perforations obtained by etching
GB967002A (en) * 1961-05-05 1964-08-19 Standard Telephones Cables Ltd Improvements in or relating to semiconductor devices
US3290753A (en) * 1963-08-19 1966-12-13 Bell Telephone Labor Inc Method of making semiconductor integrated circuit elements

Also Published As

Publication number Publication date
CH451325A (de) 1968-05-15
US3419956A (en) 1969-01-07
NL6700219A (de) 1967-07-13
DE1589918B2 (de) 1971-01-14
DE1589918A1 (de) 1970-06-04
US3357871A (en) 1967-12-12
DE1589920A1 (de) 1970-09-17
SE326504B (de) 1970-07-27
DE1589920B2 (de) 1971-02-18
BE692869A (de) 1967-07-03
GB1137577A (en) 1968-12-27
NL6700993A (de) 1967-07-24
FR1509408A (fr) 1968-01-12
BE691802A (de) 1967-05-29
NL154062B (nl) 1977-07-15
NL154060B (nl) 1977-07-15
GB1096484A (en) 1967-12-29
FR1507802A (fr) 1967-12-29

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