CH511496A - Integrated capacitive memory and method for operating the memory in a circuit arrangement - Google Patents

Integrated capacitive memory and method for operating the memory in a circuit arrangement

Info

Publication number
CH511496A
CH511496A CH600269A CH600269A CH511496A CH 511496 A CH511496 A CH 511496A CH 600269 A CH600269 A CH 600269A CH 600269 A CH600269 A CH 600269A CH 511496 A CH511496 A CH 511496A
Authority
CH
Switzerland
Prior art keywords
memory
operating
circuit arrangement
integrated capacitive
capacitive memory
Prior art date
Application number
CH600269A
Other languages
German (de)
Inventor
Mulder Cornelis
Johan Sangster Leonard
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to CH873370A priority Critical patent/CH519792A/en
Publication of CH511496A publication Critical patent/CH511496A/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/18—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
    • G11C19/182—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/18—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
    • G11C19/182—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes
    • G11C19/184—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes with field-effect transistors, e.g. MOS-FET
    • G11C19/186—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes with field-effect transistors, e.g. MOS-FET using only one transistor per capacitor, e.g. bucket brigade shift register
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/04—Shift registers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/891—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D44/00, e.g. integration of charge-coupled devices [CCD] or charge injection devices [CID
    • H10D84/895—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D44/00, e.g. integration of charge-coupled devices [CCD] or charge injection devices [CID comprising bucket-brigade charge-coupled devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Bipolar Transistors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Networks Using Active Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
CH600269A 1968-04-23 1969-04-21 Integrated capacitive memory and method for operating the memory in a circuit arrangement CH511496A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CH873370A CH519792A (en) 1968-04-23 1969-04-21 transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL6805704.A NL162500C (en) 1968-04-23 1968-04-23 INTEGRATED CAPACITOR MEMORY.

Publications (1)

Publication Number Publication Date
CH511496A true CH511496A (en) 1971-08-15

Family

ID=19803412

Family Applications (1)

Application Number Title Priority Date Filing Date
CH600269A CH511496A (en) 1968-04-23 1969-04-21 Integrated capacitive memory and method for operating the memory in a circuit arrangement

Country Status (11)

Country Link
JP (1) JPS509515B1 (en)
AT (1) AT301908B (en)
BE (1) BE731974A (en)
CH (1) CH511496A (en)
DE (2) DE1966847A1 (en)
DK (1) DK131253B (en)
ES (2) ES366285A1 (en)
FR (1) FR2011816A1 (en)
GB (2) GB1271155A (en)
NL (1) NL162500C (en)
SE (1) SE386299B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8574629B2 (en) * 2008-08-01 2013-11-05 Anteis S.A. Injectable hydrogel with an enhanced remanence and with an enhanced ability to create volume

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3356860A (en) * 1964-05-08 1967-12-05 Gen Micro Electronics Inc Memory device employing plurality of minority-carrier storage effect transistors interposed between plurality of transistors for electrical isolation

Also Published As

Publication number Publication date
JPS509515B1 (en) 1975-04-14
NL162500B (en) 1979-12-17
DE1966847A1 (en) 1974-09-19
GB1271155A (en) 1972-04-19
AT301908B (en) 1972-09-25
DK131253C (en) 1975-11-17
NL6805704A (en) 1969-10-27
DE1919507B2 (en) 1979-12-06
DE1919507A1 (en) 1969-11-20
GB1271154A (en) 1972-04-19
ES386979A1 (en) 1973-12-01
ES366285A1 (en) 1971-05-01
SE386299B (en) 1976-08-02
NL162500C (en) 1980-05-16
BE731974A (en) 1969-10-23
FR2011816A1 (en) 1970-03-13
DK131253B (en) 1975-06-16
DE1919507C3 (en) 1982-06-09

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Legal Events

Date Code Title Description
PL Patent ceased