CH529483A - Circuit logique et son utilisation pour constituer un circuit décodeur binaire - Google Patents
Circuit logique et son utilisation pour constituer un circuit décodeur binaireInfo
- Publication number
- CH529483A CH529483A CH692170A CH692170A CH529483A CH 529483 A CH529483 A CH 529483A CH 692170 A CH692170 A CH 692170A CH 692170 A CH692170 A CH 692170A CH 529483 A CH529483 A CH 529483A
- Authority
- CH
- Switzerland
- Prior art keywords
- constitute
- circuit
- binary decoder
- logic circuit
- decoder circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/14—Conversion to or from non-weighted codes
- H03M7/20—Conversion to or from n-out-of-m codes
- H03M7/22—Conversion to or from n-out-of-m codes to or from one-out-of-m codes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US82253369A | 1969-05-07 | 1969-05-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CH529483A true CH529483A (fr) | 1972-10-15 |
Family
ID=25236298
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH692170A CH529483A (fr) | 1969-05-07 | 1970-05-08 | Circuit logique et son utilisation pour constituer un circuit décodeur binaire |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US3631465A (fr) |
| JP (1) | JPS5122790B1 (fr) |
| BE (1) | BE749885A (fr) |
| BR (1) | BR7018865D0 (fr) |
| CA (1) | CA932860A (fr) |
| CH (1) | CH529483A (fr) |
| ES (1) | ES380077A1 (fr) |
| FR (1) | FR2047376A5 (fr) |
| GB (1) | GB1312502A (fr) |
| NL (1) | NL7005823A (fr) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3825888A (en) * | 1971-06-23 | 1974-07-23 | Hitachi Ltd | Decoder circuit |
| US3851186A (en) * | 1973-11-09 | 1974-11-26 | Bell Telephone Labor Inc | Decoder circuit |
| US4308526A (en) * | 1980-09-15 | 1981-12-29 | Motorola Inc. | Binary to one of N decoder having a true and a complement output |
| US5055717A (en) * | 1986-05-30 | 1991-10-08 | Texas Instruments Incorporated | Data selector circuit and method of selecting format of data output from plural registers |
| JPH0766732A (ja) * | 1993-08-25 | 1995-03-10 | Mitsubishi Electric Corp | 符号変換装置 |
| US6144325A (en) * | 1996-12-20 | 2000-11-07 | International Business Machines Corporation | Register file array having a two-bit to four-bit encoder |
| US6195027B1 (en) * | 1999-04-30 | 2001-02-27 | International Business Machines Corporation | Capacitive precharging and discharging network for converting N bit input into M bit output |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2769968A (en) * | 1953-07-13 | 1956-11-06 | Bendix Aviat Corp | Matrix type decoding circuit for binary code signals |
| US3373421A (en) * | 1964-10-15 | 1968-03-12 | Rca Corp | Conversion from gray code to binary code |
| US3355598A (en) * | 1964-11-25 | 1967-11-28 | Rca Corp | Integrated logic arrays employing insulated-gate field-effect devices having a common source region and shared gates |
| US3479523A (en) * | 1966-09-26 | 1969-11-18 | Ibm | Integrated nor logic circuit |
| US3500062A (en) * | 1967-05-10 | 1970-03-10 | Rca Corp | Digital logic apparatus |
| US3539823A (en) * | 1968-08-06 | 1970-11-10 | Rca Corp | Logic circuit |
-
1969
- 1969-05-07 US US822533A patent/US3631465A/en not_active Expired - Lifetime
- 1969-12-05 CA CA069117A patent/CA932860A/en not_active Expired
-
1970
- 1970-04-22 NL NL7005823A patent/NL7005823A/xx unknown
- 1970-05-04 BE BE749885D patent/BE749885A/fr not_active IP Right Cessation
- 1970-05-05 ES ES380077A patent/ES380077A1/es not_active Expired
- 1970-05-06 FR FR7016536A patent/FR2047376A5/fr not_active Expired
- 1970-05-06 GB GB2177370A patent/GB1312502A/en not_active Expired
- 1970-05-07 BR BR218865/70A patent/BR7018865D0/pt unknown
- 1970-05-07 JP JP45038354A patent/JPS5122790B1/ja active Pending
- 1970-05-08 CH CH692170A patent/CH529483A/fr not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| GB1312502A (en) | 1973-04-04 |
| JPS5122790B1 (fr) | 1976-07-12 |
| BE749885A (fr) | 1970-10-16 |
| DE2022254A1 (de) | 1970-11-19 |
| CA932860A (en) | 1973-08-28 |
| BR7018865D0 (pt) | 1973-03-13 |
| DE2022254B2 (de) | 1977-05-26 |
| ES380077A1 (es) | 1972-08-16 |
| FR2047376A5 (fr) | 1971-03-12 |
| NL7005823A (fr) | 1970-11-10 |
| US3631465A (en) | 1971-12-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PL | Patent ceased |