CH531257A - Verfahren zur Herstellung von Halbleiter-Gleichrichter-Anordnungen - Google Patents

Verfahren zur Herstellung von Halbleiter-Gleichrichter-Anordnungen

Info

Publication number
CH531257A
CH531257A CH1665370A CH1665370A CH531257A CH 531257 A CH531257 A CH 531257A CH 1665370 A CH1665370 A CH 1665370A CH 1665370 A CH1665370 A CH 1665370A CH 531257 A CH531257 A CH 531257A
Authority
CH
Switzerland
Prior art keywords
production
semiconductor rectifier
rectifier arrangements
arrangements
semiconductor
Prior art date
Application number
CH1665370A
Other languages
English (en)
Inventor
Schierz Winfried
Original Assignee
Semikron Gleichrichterbau
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semikron Gleichrichterbau filed Critical Semikron Gleichrichterbau
Publication of CH531257A publication Critical patent/CH531257A/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/481—Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H10W70/048—Mechanical treatments, e.g. punching, cutting, deforming or cold welding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/442—Shapes or dispositions of multiple leadframes in a single chip
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
CH1665370A 1969-12-23 1970-11-11 Verfahren zur Herstellung von Halbleiter-Gleichrichter-Anordnungen CH531257A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691964481 DE1964481A1 (de) 1969-12-23 1969-12-23 Verfahren zur Herstellung von Halbleiter-Gleichrichteranordnungen

Publications (1)

Publication Number Publication Date
CH531257A true CH531257A (de) 1972-11-30

Family

ID=5754803

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1665370A CH531257A (de) 1969-12-23 1970-11-11 Verfahren zur Herstellung von Halbleiter-Gleichrichter-Anordnungen

Country Status (8)

Country Link
US (1) US3691629A (de)
JP (1) JPS4921473B1 (de)
CH (1) CH531257A (de)
DE (1) DE1964481A1 (de)
ES (1) ES387306A1 (de)
FR (1) FR2116330A1 (de)
GB (1) GB1330509A (de)
SE (1) SE356638B (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4044201A (en) * 1974-09-17 1977-08-23 E. I. Du Pont De Nemours And Company Lead frame assembly
US4012835A (en) * 1974-09-17 1977-03-22 E. I. Du Pont De Nemours And Co. Method of forming a dual in-line package
US4214120A (en) * 1978-10-27 1980-07-22 Western Electric Company, Inc. Electronic device package having solder leads and methods of assembling the package
US5133118A (en) * 1991-08-06 1992-07-28 Sheldahl, Inc. Surface mounted components on flex circuits
US7271047B1 (en) * 2006-01-06 2007-09-18 Advanced Micro Devices, Inc. Test structure and method for measuring the resistance of line-end vias
US10730276B2 (en) * 2017-01-17 2020-08-04 Maven Optronics Co., Ltd. System and method for vacuum film lamination

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3065525A (en) * 1957-09-13 1962-11-27 Sylvania Electric Prod Method and device for making connections in transistors
US3391456A (en) * 1965-04-30 1968-07-09 Sylvania Electric Prod Multiple segment array making
US3577633A (en) * 1966-12-02 1971-05-04 Hitachi Ltd Method of making a semiconductor device

Also Published As

Publication number Publication date
SE356638B (de) 1973-05-28
FR2116330A1 (de) 1972-07-13
US3691629A (en) 1972-09-19
DE1964481A1 (de) 1971-07-01
ES387306A1 (es) 1974-01-16
JPS4921473B1 (de) 1974-06-01
GB1330509A (en) 1973-09-19

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Legal Events

Date Code Title Description
PL Patent ceased