CH538158A - Multiplication circuit - Google Patents

Multiplication circuit

Info

Publication number
CH538158A
CH538158A CH542072A CH542072A CH538158A CH 538158 A CH538158 A CH 538158A CH 542072 A CH542072 A CH 542072A CH 542072 A CH542072 A CH 542072A CH 538158 A CH538158 A CH 538158A
Authority
CH
Switzerland
Prior art keywords
multiplication circuit
multiplication
circuit
Prior art date
Application number
CH542072A
Other languages
German (de)
Inventor
Schwaier Arnold
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19712127109 external-priority patent/DE2127109C/en
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH538158A publication Critical patent/CH538158A/en

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01G—WEIGHING
    • G01G11/00—Apparatus for weighing a continuous stream of material during flow; Conveyor belt weighers
    • G01G11/04—Apparatus for weighing a continuous stream of material during flow; Conveyor belt weighers having electrical weight-sensitive devices
    • G01G11/043—Apparatus for weighing a continuous stream of material during flow; Conveyor belt weighers having electrical weight-sensitive devices combined with totalising or integrating devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor
    • G06G7/16—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for multiplication or division
    • G06G7/161—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for multiplication or division with pulse modulation, e.g. modulation of amplitude, width, frequency, phase or form

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Controlling Rewinding, Feeding, Winding, Or Abnormalities Of Webs (AREA)
CH542072A 1971-06-01 1972-04-13 Multiplication circuit CH538158A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19712127109 DE2127109C (en) 1971-06-01 Multiplication circuit

Publications (1)

Publication Number Publication Date
CH538158A true CH538158A (en) 1973-06-15

Family

ID=5809489

Family Applications (1)

Application Number Title Priority Date Filing Date
CH542072A CH538158A (en) 1971-06-01 1972-04-13 Multiplication circuit

Country Status (4)

Country Link
CH (1) CH538158A (en)
FR (1) FR2141098A5 (en)
NL (1) NL7207168A (en)
SE (1) SE381115B (en)

Also Published As

Publication number Publication date
DE2127109B2 (en) 1972-05-25
NL7207168A (en) 1972-12-05
FR2141098A5 (en) 1973-01-19
SE381115B (en) 1975-11-24
DE2127109A1 (en) 1972-05-25

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Legal Events

Date Code Title Description
PL Patent ceased