CH584456A5 - - Google Patents
Info
- Publication number
- CH584456A5 CH584456A5 CH525675A CH525675A CH584456A5 CH 584456 A5 CH584456 A5 CH 584456A5 CH 525675 A CH525675 A CH 525675A CH 525675 A CH525675 A CH 525675A CH 584456 A5 CH584456 A5 CH 584456A5
- Authority
- CH
- Switzerland
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/60—Impurity distributions or concentrations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
- H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
- H10D84/221—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P54/00—Cutting or separating of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CH525675A CH584456A5 (fr) | 1975-04-24 | 1975-04-24 | |
| DE19752521848 DE2521848A1 (de) | 1975-04-24 | 1975-05-16 | Hochspannungs-halbleiterdiode und verfahren zu ihrer herstellung |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CH525675A CH584456A5 (fr) | 1975-04-24 | 1975-04-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CH584456A5 true CH584456A5 (fr) | 1977-01-31 |
Family
ID=4290542
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH525675A CH584456A5 (fr) | 1975-04-24 | 1975-04-24 |
Country Status (2)
| Country | Link |
|---|---|
| CH (1) | CH584456A5 (fr) |
| DE (1) | DE2521848A1 (fr) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19735542A1 (de) | 1997-08-16 | 1999-02-18 | Bosch Gmbh Robert | Hochspannungsbauelement und Verfahren zu seiner Herstellung |
| FR2779292B1 (fr) * | 1998-05-27 | 2000-09-29 | Sgs Thomson Microelectronics | Association de diodes en serie |
-
1975
- 1975-04-24 CH CH525675A patent/CH584456A5/xx not_active IP Right Cessation
- 1975-05-16 DE DE19752521848 patent/DE2521848A1/de active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| DE2521848A1 (de) | 1976-11-04 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PL | Patent ceased | ||
| PLX | Patent declared invalid from date of grant onwards |