CH596614A5 - - Google Patents

Info

Publication number: CH596614A5
Authority: CH; Switzerland

Application number

CH738474A

Inventor

Charles D Card

John Reed Crane

Original Assignee

Sperry Rand Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1973-05-30

Filing date

1974-05-30

Publication date

1978-03-15

1974-05-30 Application filed by Sperry Rand Corp filed Critical Sperry Rand Corp

1978-03-15 Publication of CH596614A5 publication Critical patent/CH596614A5/xx

Links

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/04—Addressing variable-length words or parts of words

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Executing Machine-Instructions (AREA)
Controls And Circuits For Display Device (AREA)

CH738474A 1973-05-30 1974-05-30 CH596614A5 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US00365373A US3828316A (en)	1973-05-30	1973-05-30	Character addressing in a word oriented computer system

Publications (1)

Publication Number	Publication Date
CH596614A5 true CH596614A5 (de)	1978-03-15

Family

ID=23438623

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
CH738474A CH596614A5 (de)	1973-05-30	1974-05-30

Country Status (4)

Country	Link
US (1)	US3828316A (de)
CH (1)	CH596614A5 (de)
DE (1)	DE2425574C2 (de)
GB (1)	GB1477381A (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5333413B2 (de) *	1974-05-13	1978-09-13
US4146874A (en) *	1978-03-20	1979-03-27	International Business Machines Corporation	Method and apparatus for addressing a character generator
FR2472231B1 (fr) *	1979-12-20	1986-02-21	Cii Honeywell Bull	Dispositif d'adressage d'elements d'informations dans une table a plusieurs entrees, enregistree dans une memoire
GB2077009B (en) *	1980-05-30	1985-04-17	Fairchild Camera Instr Co	Microprocessor
US4691279A (en) *	1984-03-02	1987-09-01	Unisys Corporation	Instruction buffer for a digital data processing system
DE3572551D1 (en) *	1984-09-13	1989-09-28	Siemens Ag	Circuit arrangement for the instruction-dependent calculation of operand addresses and for checking the page boundary crossing at operands for logical or decimal storage-to-storage instructions
US5072372A (en) *	1989-03-03	1991-12-10	Sanders Associates	Indirect literal expansion for computer instruction sets
DE69227604T2 (de) *	1991-03-11	1999-06-24	Silicon Graphics Inc., Mountain View, Calif. 94039	Rückwärts kompatible Rechnerarchitektur mit erweiterten Wortbreiten und Adressraum
DE69434971T2 (de) *	1993-05-27	2008-01-17	Matsushita Electric Industrial Co., Ltd., Kadoma	Programmumsetzungseinheit
US6757819B1 (en) *	2000-02-18	2004-06-29	Texas Instruments Incorporated	Microprocessor with instructions for shifting data responsive to a signed count value
US9313127B2 (en) *	2013-02-01	2016-04-12	Texas Instruments Incorporated	Rotate-mask-merge and deposit-field instructions for packet processing

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US3331056A (en) *	1964-07-15	1967-07-11	Honeywell Inc	Variable width addressing arrangement
US3389380A (en) *	1965-10-05	1968-06-18	Sperry Rand Corp	Signal responsive apparatus
US3602896A (en) *	1969-06-30	1971-08-31	Ibm	Random access memory with flexible data boundaries
US3716838A (en) *	1970-08-24	1973-02-13	Honeywell Inf Systems	Data processing system with selective character addressing of system store
US3731283A (en) *	1971-04-13	1973-05-01	L Carlson	Digital computer incorporating base relative addressing of instructions
US3781812A (en) *	1971-06-28	1973-12-25	Burroughs Corp	Addressing system responsive to a transfer vector for accessing a memory

1973
- 1973-05-30 US US00365373A patent/US3828316A/en not_active Expired - Lifetime
1974
- 1974-05-27 DE DE2425574A patent/DE2425574C2/de not_active Expired
- 1974-05-29 GB GB2379874A patent/GB1477381A/en not_active Expired
- 1974-05-30 CH CH738474A patent/CH596614A5/xx not_active IP Right Cessation

Also Published As

Publication number	Publication date
GB1477381A (en)	1977-06-22
AU6950774A (en)	1975-12-04
DE2425574A1 (de)	1974-12-19
DE2425574C2 (de)	1984-06-20
US3828316A (en)	1974-08-06

Legal Events

Date	Code	Title
1980-07-31	PFA	Name/firm changed
1992-01-31	PL	Patent ceased
2024-10-31	PL	Patent ceased

Publication	Publication Date	Title
AR201758A1 (de)	1975-04-15
AU476761B2 (de)	1976-09-30
AR201235Q (de)	1975-02-21
AR201231Q (de)	1975-02-21
AU474593B2 (de)	1976-07-29
AU474511B2 (de)	1976-07-22
AU474838B2 (de)	1976-08-05
AU465453B2 (de)	1975-09-25
AU450229B2 (de)	1974-07-04
AU476714B2 (de)	1976-09-30
AR201229Q (de)	1975-02-21
AU476696B2 (de)	1976-09-30
AU472848B2 (de)	1976-06-03
AU466283B2 (de)	1975-10-23
AR199451A1 (de)	1974-08-30
FR2245049A1 (de)	1975-04-18
AR193950A1 (de)	1973-05-31
AR197627A1 (de)	1974-04-23
AU471461B2 (de)	1976-04-29
AU447540B2 (de)	1974-03-25
AR201432A1 (de)	1975-03-14
AR200885A1 (de)	1974-12-27
AU476873B1 (de)	1975-01-09
AU477824B2 (de)	1975-07-17
AR210729A1 (de)	1977-09-15